I'm working on an embedded system which will generate data at a pretty high rate, 100-300Mbit/s. This is coming from a bunch of SPI busses. I need to get this into a Linux PC. What's the best way to do that?
At the moment I have a small portion of this built with a STM32F4 microcontroller as proof of concept. It gets data at around 20Mbit/s. I'm realizing that (a) there is probably no way for the F4 to read data at 100Mbit+, and that is probably still going to be hard/impossible for faster parts like F7 or H7 since the APB clock is limited to 100MHz; and (b) there is no way to send data to a PC that fast from these microcontrollers either, especially while both reading and sending. Reading and sending simultaneously at 20Mbit is probably (just barely) possible.
The main options for sending data to the PC would seem to be USB or ethernet. High speed USB is theoretically fast enough at 480 Mbit, but ST microcontrollers mostly don't have it - although it looks like some parts have ULPI. 100Mbit ethernet is not fast enough; gigabit is again theoretically fast enough, but none of the ST microcontrollers have that (or SGMII). I don't know what the practical speed ceiling is for streaming data over HS-USB or 100MBit ethernet, but I'm guessing it's a lot less than the theoretical speed.
So, the question is, what is the best way to stream data at the aggregate speeds I need? (either with a fast IO friendly microcontroller, or something else).
A few options:
- split the device into several independent devices (maybe 4-8 or so) and send data from each one either over HS-USB with a ULPI USB chip (USB3300 or similar) or 100Mbit ethernet to PC with multiple USB ports/multiple ethernet ports - the PC can reassemble these streams, or
- same, but put something in front to aggregate the connections: USB hub or ethernet switch. could be on board to the device reduce number of physical wires, or a separate device
- use a different microcontroller or SOC which can handle the total data rate in one device
- use a FPGA (but which one? it seems like most low cost FPGAs like ICE40 don't have SGMII either)
In this case there is literally no processing that happens; the micro sends a few setup commands to the SPI buses and after that it's just passing data through (possibly assembling the data into blocks and adding headers per block on the output). There are also no special timing/latency requirements, as long as the data can stream continuously with nothing dropped. I want a setup that is as simple and robust as possible. I'm very familiar with ARM microcontrollers; less so with FPGAs. I'd like to avoid high-end/specialty parts (of course a Kintex FPGA could handle this, but...)