I'm just trying to visualize how the current flows in the following circuit. It is a follow-on question from here. The circuit is a small-signal model for a common-source MOSFET with source degeneration. In particular it is analysing the output resistance using voltage source Vx and measuring Ix. However, that is irrelevant to this question.
I have a few ideas, however I am pretty sure 1 and 2 are just outright wrong.
In this explanation, I was thinking that the VCCS is generating a current in that branch. That current must come from the node that is connected with Vx and ro. That gmvgs current will be sourced from the two branches depending on the impedance that the current 'sees'. Since Vx is an ideal voltage source, it must have 0 input impedance and hence the gmvgs current must all flow through that. This gives Ix = gmvgs.
This explanation is very very flimsy.
In this explanation, I am also thinking about current division but from the point of view of the Ix current. Ix is flowing into the with the ro branch and VCCS branch. I thought that the current should divide according to its resistance. However the input resistance of a VCCS is not defined? This explanation seems completely wrong and my conclusion for this was that the current-source will pull that current no matter what, so current division isn't possible?
In this explanation,
- gmvgs flows from node X into node S, so it can be thought that a loop is formed with ro, since the VCCS will want gmvgs flowing into it and flowing out.
- Now that the VCCS branch is happy, the Ix current must then flow through ro, through Rs and to GND.
If someone could just clarify these doubts in my mind that would great. I just would like to know why some of my explanations (or all) are incorrect and what is the correct way to go about thinking of this circuit, particularly when ideal elements are involved. Is current division still valid, since the series resistance of an ideal voltage source is 0?