Even though I'm an EE with 30+ years experience, a simple question asked by a junior colleague really stumped me. Namely, on a data sheet (e.g., for a 2N2222), that transistor can only SINK conventional current so why does the Ic or Ib not have a minus sign on the specs and curves? Same thing for a PNP.
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1\$\begingroup\$ Can you edit to include the datasheet links for 2N2222 that you're using and PNP? \$\endgroup\$– TransistorCommented Mar 21, 2021 at 18:16
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2 Answers
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For NPN (and N-channel MOS) they defined Ic (or Id) to be current going into the collector (or drain) and Ib going into the base. It is that simple.
Often PNP (and P-channel MOSFET) datasheets DO use negative signs for the currents and voltages, remaining consistent with the sign convention for NPN (and N-channel).
Image from 2N3906 datasheet.
The only point of inconsistency is that some companies report currents for both polarities of transistor as positive, thus using opposite sign conventions for NPN and PNP. While I can't say WHY they do this, I will say that it shouldn't confuse anyone who has at least a tiny bit of experience.
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1\$\begingroup\$ I was not confused, having used these for decades, just curious why this is so - data sheets are usually totally OCD about terminology. BTW, the data sheet shown in a previous comment DOES show a negative sign. \$\endgroup\$ Commented Mar 21, 2021 at 20:24
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1\$\begingroup\$ I knew you weren't confused. Was more thinking of your junior colleague. ;-) \$\endgroup\$ Commented Mar 21, 2021 at 20:34
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This is a convention to define positive voltages that says positive sources go into lower voltage sink loads with positive current.
This is inspite of the fact that electrons go the opposite direction for “+ve” current. It’s a convention to make it more logical.
Graphically the current direction is shown to down down from + to 0V . So it is still down to ground pulling from the + source.
Whereas a PNP sink is negative current from the ground source going up into the +ve supply in the negative direction.
But for enhanced channel FET’s the N ch source is negative like the NPN emitter and the drain is like the collector and when used a low side switch, it is sinking current into the “source pin” because it is the gate voltage must be positive well above threshold to bias on the gate charge to “source” pin. Even tho the drain NCh (+) is sinking current. It is also sinking positive current and visa versa for Pch FETs.
By the way a PN2222A chip is an NPN 2 ohm sink load when switched with Ic/Ib=10 unlike 2N29xx types that >= 6 Ohms.
