I'm currently designing a PCB with double side components and I'm limited to 6 layers max. The project has couple of MCUs at 84 MHz. There are USART, I2C, SPI, some analogue lines and high-power lines in the design but not any high-speed lines. There are also some very short RF lines for antennas.

The problem is due to the high density and limited size of the PCB I can't use this stackup: S-G-S-S-P-S At some parts of the PCB specially around the high pin count MCUs there's need for signal lines to go through the ground or power plane.

Also all the power electronics and switching components are on the back side.

This is the stackup properties provided by the PCB manufacturer: enter image description here

So my main concern is if routing some signal lines through the power/ground plane will cause me problems or not?

  • \$\begingroup\$ If you take care it should not be a problem. How experienced are you are PCB layout? \$\endgroup\$
    – Andy aka
    Mar 25, 2021 at 13:22
  • \$\begingroup\$ if you need to cut the plane, track it around the edge to ensure a continous gnd plane \$\endgroup\$
    – user16222
    Mar 25, 2021 at 13:26
  • \$\begingroup\$ PCB designers route signals on power and ground layers all the time. The key is understanding what you're doing and ensuring that signal integrity is maintained. \$\endgroup\$
    – jwh20
    Mar 25, 2021 at 13:27
  • \$\begingroup\$ @JonRB Thanks, I have already done that. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 13:41
  • \$\begingroup\$ @Andyaka I have started couple years back and have designed handful of professional PCBs, so I'm not an expert but I'm tiring to get there. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 13:44

2 Answers 2


3 basic rules

Rule #1: Bandwidth is not the clock speed rather the rise time f-3dB=0.35/Tr (10~90%) so you probably want thinner dielectric than normal for lower impedance tracks

  • this helps keep track/gap <= 5 mil (127 um) and < matched via impedance which raises L but thinner dielectrics raises C to maintain Z^2=L/C Also 3 mil (64um) track/gap is doable by good shops.

Rule #2 avoid crosstalk with adjacent SS layer parallel tracks.

Rule #3: Use lots of microvias for PS layer connections to other layers grids and appropriate decoupling cap per IC. If a Microvia is 50 Ohms on a power supply that is 50 mOhms, how many do you need? ( not depends on decoupling caps and rise time and ringing tolerance)

If you don't already have , get Saturn PCB Design Toolkit

  • 1
    \$\begingroup\$ Thanks for the recommendation, all the tracks that need to be routed through planes are simple digital inputs for external sensors, so after reading all the comments and answers I believe It should be fine. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 14:09
  • \$\begingroup\$ OK now try to route it on 4 layers for a cost reduction j/k that 's next year job if volume goes high \$\endgroup\$ Mar 25, 2021 at 14:13
  • \$\begingroup\$ That'll be a good challenge to do if it gets to that point. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 14:27
  • \$\begingroup\$ A day’s job with a good auto-router \$\endgroup\$ Mar 25, 2021 at 15:16
  • \$\begingroup\$ Can you recommend me one ? \$\endgroup\$
    – Oli
    Mar 25, 2021 at 18:12

Experienced PCB designers DO NOT route signals on power and ground layers all the time. They just don't do it unless there are no other ways to complete the routing.

You might need a lot of vias to complete your routing.

Reduce the size of your vias.

In high density boards I used the following via:

copper pads on top = 0.45 mm
drill = 0.15 mm
copper pads in inner layers = 0.45 (*)
copper pads on bottom = 0.45 mm

(*) Whenever I can, I enlarge inner pads 0.55 mm to make the PCB manufacture happy.

There's no extra cost to pay for these vias. They fit their standard manufacturing flow.

  • \$\begingroup\$ Thanks, I used to route signals on plane layers only if I had to, but after reading some papers about how bad it could be I avoided it completely and changed the layout or increased the layer count whenever I could. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 14:04
  • \$\begingroup\$ Unless you plan to go to an EMC notified body for CE or UL compliance tests, don't go mad to complete your routing. \$\endgroup\$ Mar 25, 2021 at 14:14
  • \$\begingroup\$ Thanks for the heads-up. I have been warned many times about the importance of routing back when I was studding, so I do some times try to go over the top. \$\endgroup\$
    – Oli
    Mar 25, 2021 at 14:30

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