DS1302 does not truly use standard SPI because the single "I/O" data signal is time-multiplexed during communication (driven by the chip during a read between the falling-edge of "CLK" to just after the rising-edge of "CLK", high-z at all other times).
Standard SPI has separate MOSI (Master-Out/Slave-In) and MISO (Master-In/Slave-Out) pins for each peripheral (although the MISO can be three-stated by the peripheral if it is multiplexed with multiple slaves).
DS1302 "CE" (previously referred to as "/RST") is absolutely essential in communication to start/stop each transmission, plus store the RTC data after a "Burst" (you can NOT simply connect it to a rail). Also, the first bit sent after CE is asserted indicates if you are doing a Read (1) or a Write (0).
That being said, there's still less protocol overhead than using I2C, because you don't need to worry about I2C-specific addressing and timing.
Even at the 2V specification (the datasheet gives timing for 2V and 5V), the
DS1302 is still faster than using I2C, and WAY faster when using 5V.
Be aware that each of the 3 communications pins for the
DS1302 have a (nominal) 40k pull-down resistor, to avoid allowing the pins to float.