# Clock conversion from 3.3v CMOS to 2.5v

I need to convert a bunch of data signals from an FPGA coming out at 3.3V CMOS into 2.5V for an LCD display. I've found the SN74CB3T16210 and the SN74AVCBH164245 and they both seem like they'll do the job, but I'm worried about the clock line. I have a pixel clock running at around 10MHz that also needs to be level shifted and I'm worried that it won't come out clean.

Is the clock actually going to be a problem with either of these solutions?

• I know that for SPI for 5V to 3.3V just voltage divisors of two resistors are used. You can see it here. That's lower speed however I believe, but you might just test this with your speed. – user17592 Jan 20 '13 at 20:43
• Takea look at the rating of the level translators and if they can support it. More important than the frequency is the rise and fall time. – Gustavo Litovsky Jan 20 '13 at 21:01
• Please place links to associated devices you are using in the question, it is very useful to our members if they can just click and open the datasheet for your product. – Kortuk Jan 20 '13 at 21:34
• Also, it would be helpful to explain exactly what you mean by "level shifted"? What are the final V_hi and V_low levels you need? – The Photon Jan 20 '13 at 22:17

$t_{\mathrm{edge}} = \dfrac{\Delta{}V}{CI}$