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My circuit simulation basically would last forever, it's a filter circuit but LTSpice can't run it. any help/insight will be greatly appreciated! enter image description here

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3
  • \$\begingroup\$ If you haven't already, look up how to optimize processor usage. Some circuits just take a long time to simulate. On the other hand a bad model can be really slow or you may have given the computer something difficult to calculate. I have two 555 timers, one just about shuts down my computer, the other one runs reasonably fast. I have no idea why, but both function the same. \$\endgroup\$
    – K H
    Commented Mar 28, 2021 at 21:29
  • \$\begingroup\$ Set the initial conditions to run faster: analog.com/en/technical-articles/… \$\endgroup\$
    – pnatk
    Commented Mar 28, 2021 at 21:30
  • 3
    \$\begingroup\$ Probably not your problem, but do you really need to have 1ps rise and fall times? Kind of unrealistic. I would use 10ns or 100ns. \$\endgroup\$ Commented Mar 28, 2021 at 22:38

2 Answers 2

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  1. Check the reltol/voltol etc. options. Either with the .option command, or behind the hammer icon (4th icon in the bar). Make the tolerances higher for faster simulation speeds while sacrificing accuracy.
  2. You have a floating node behind a reactive element at C5. It's good practice to avoid floating nodes in a circuit. I guess this node is where the output appears? Easiest case: put a high value resistor to ground there.
  3. Try finding a different model for your used ICs if all fails.
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    \$\begingroup\$ *tol options should only be used as a last resort, the first thing to try is the model (your point 3). So point 1 should be mentioned last, as an alternative if all else fails. Also, point 2 has nothing to do with this case: if the simulator didn't like floating nodes it would have complained from the very start, without starting the simulation, and if the simulator doesn't care (this case) then it can be ignored. \$\endgroup\$ Commented Mar 29, 2021 at 7:48
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I believe the combination of your Q-boosted Delyiannis-Friend bandpass circuit saturating the output stage of the built-in OP284 model is causing the issues. I built your circuit and was able to get it to run the full 1ms by either using UniversalOpamp2 instead of OP284, using the alternate solver instead of normal solver, or setting .options abstol=1u instead of the default of 1p. The solver settings are found in Tools -> Control Panel -> SPICE. Screenshot and text representation of the .ASC file is posted below.

enter image description here

Version 4
SHEET 1 2368 680
WIRE 384 16 288 16
WIRE 576 16 464 16
WIRE 32 32 32 16
WIRE 144 32 144 16
WIRE 896 112 816 112
WIRE 1040 112 960 112
WIRE 1296 112 1040 112
WIRE 32 128 32 112
WIRE 144 128 144 112
WIRE 288 128 288 16
WIRE 304 128 288 128
WIRE 576 128 576 16
WIRE 576 128 560 128
WIRE 1632 128 1552 128
WIRE 1776 128 1696 128
WIRE 2032 128 1776 128
WIRE 1040 144 1040 112
WIRE 1776 160 1776 128
WIRE 304 192 224 192
WIRE 592 192 560 192
WIRE 224 224 224 192
WIRE 304 256 -224 256
WIRE 672 256 560 256
WIRE 816 256 816 112
WIRE 816 256 752 256
WIRE 896 256 816 256
WIRE 1040 256 1040 224
WIRE 1040 256 960 256
WIRE 1152 256 1040 256
WIRE 1296 272 1296 112
WIRE 1296 272 1216 272
WIRE 1408 272 1296 272
WIRE 1552 272 1552 128
WIRE 1552 272 1488 272
WIRE 1632 272 1552 272
WIRE 1776 272 1776 240
WIRE 1776 272 1696 272
WIRE 1888 272 1776 272
WIRE -224 288 -224 256
WIRE 1152 288 1104 288
WIRE 2032 288 2032 128
WIRE 2032 288 1952 288
WIRE 2144 288 2032 288
WIRE 816 304 816 256
WIRE 1296 304 1296 272
WIRE 1888 304 1840 304
WIRE 304 320 288 320
WIRE 592 320 560 320
WIRE 1552 320 1552 272
WIRE 2032 320 2032 288
WIRE -224 400 -224 368
WIRE 1104 416 1104 288
WIRE 1296 416 1296 384
WIRE 1296 416 1104 416
WIRE 816 432 816 384
WIRE 1840 432 1840 304
WIRE 2032 432 2032 400
WIRE 2032 432 1840 432
WIRE 1296 448 1296 416
WIRE 1552 448 1552 400
WIRE 2032 464 2032 432
WIRE 1296 560 1296 528
WIRE 2032 576 2032 544
FLAG 144 128 0
FLAG 144 16 +V
FLAG 32 128 0
FLAG 32 16 -V
FLAG 592 192 +V
FLAG 288 320 -V
FLAG -224 400 0
FLAG 592 320 0
FLAG 224 224 0
FLAG 1184 240 +V
FLAG 1184 304 -V
FLAG 816 432 0
FLAG 1296 560 0
FLAG 1920 256 +V
FLAG 1920 320 -V
FLAG 1552 448 0
FLAG 2032 576 0
FLAG 2144 288 OUT
SYMBOL voltage 144 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 32 16 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 480 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 40k
SYMBOL voltage -224 272 R0
WINDOW 3 40 42 Left 2
WINDOW 123 39 103 Left 2
WINDOW 39 39 75 Left 2
SYMATTR Value PULSE(-2 2 0 1p 1p 100u 200u)
SYMATTR InstName V3
SYMATTR SpiceLine Rser=1k
SYMBOL opamps\\LT1167 432 224 R0
SYMATTR InstName U1
SYMBOL res 768 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 34.4k
SYMBOL res 1024 128 R0
SYMATTR InstName R3
SYMATTR Value 102k
SYMBOL cap 960 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 620p
SYMBOL cap 960 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 620p
SYMBOL res 800 288 R0
SYMATTR InstName R4
SYMATTR Value 1.05k
SYMBOL res 1280 288 R0
SYMATTR InstName R5
SYMATTR Value 19.5k
SYMBOL res 1280 432 R0
SYMATTR InstName R6
SYMATTR Value 348
SYMBOL res 1504 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 35.2k
SYMBOL res 1760 144 R0
SYMATTR InstName R8
SYMATTR Value 104k
SYMBOL cap 1696 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 620p
SYMBOL cap 1696 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 620p
SYMBOL res 1536 304 R0
SYMATTR InstName R9
SYMATTR Value 1.07k
SYMBOL res 2016 304 R0
SYMATTR InstName R10
SYMATTR Value 19.5k
SYMBOL res 2016 448 R0
SYMATTR InstName R11
SYMATTR Value 348
SYMBOL Opamps\\OP284 1184 208 R0
SYMATTR InstName U2
SYMBOL Opamps\\OP284 1920 224 R0
SYMATTR InstName U3
TEXT 38 400 Left 2 !.tran 1m
TEXT 40 440 Left 2 ;.options abstol=1u
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  • \$\begingroup\$ Thanks a lot! it seems to have solved the problem. \$\endgroup\$ Commented Mar 29, 2021 at 13:02

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