Im' working with a STM3f429 dev board and a Mipot 32001353 LoRa module. This module communicates over UART. I have initialized my UART interface with cubeIDE. When i don't connect the wire between TX of module and RX of microcontroller, everything is working fine. I can use a logic analyzer to see the uart communication in both directions. As soon as i connect the TX from module to RX from microcontroller the UART goes crazy. I have no idea why. I already checked all wiring's and power supply and everything looks ok. Does anyone have an idea why this is happening?

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EDIT: Problem solved! The RX pin on the MCU was damaged. It was pulled to ground. Using another UART interface on the MCU solved the issue.

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    \$\begingroup\$ Zoom in on the second picture more. \$\endgroup\$ – DKNguyen Apr 5 at 17:34
  • \$\begingroup\$ @DKNguyen Done, it's oscillating for some reason... \$\endgroup\$ – reyntjensm Apr 5 at 17:40
  • \$\begingroup\$ Connect a 10k-20k resistor in series with that line and scope it on both sides. Or just a resistor to GND leaving the MCU RX disconnected. Does the MCU TX pin also mess up when you connect LoRA TX to MCU RX? \$\endgroup\$ – DKNguyen Apr 5 at 17:43
  • \$\begingroup\$ @DKNguyen I will try this measurement tomorrow, what should i look for when measuring on both sides of the resistor? Now the LoRa TX is only connected to my logic analyzer input, so there is no load on the line. So when i connect microcontroller TX to LoRA RX everything is fine. As soon as i connect LoRa TX to micrcontroller RX it's messed up. \$\endgroup\$ – reyntjensm Apr 5 at 19:37
  • \$\begingroup\$ For the series resistor, I'm thinking if the signal appears properly on the side closest to the LoraTX but is messed up on the side closest to the MCU RX, then the MCU pin is damaged or not configured properly. With just a resistive load to GND, if the Lora TX is messed up then maybe something is wrong with the pin. I'd double-check your connectors and connections though, including the pin seating in the connector and the crimps. \$\endgroup\$ – DKNguyen Apr 5 at 19:43

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