diff signal driver and receivers

A very basic/stupid question.. I'm designing some LVDS multipoint pcbs, and I'm a bit confused about the source termination on the driver end. my colleague said that ideally there should be a 100ohm parallel impedance matching resistor at the driver output, to reduce signal reflection. but I did some research and 99% of the time, people don't add this parallel termination resistor at the source, and only at the receiver end or the bus end (as shown above).

I understand the termination at the receiver end and bus end, but for the driver end parallel termination, is it really necessary?? my understanding is that if the differential impedance of the tracks is 100ohm, then the driver sees a 100ohm output impedance so adding another 100ohm in parallel wouldn't make a difference. plus the additional 100ohm would load the driver more which could reduce the magnitude of the diff signal.

Can anyone help me to understand why people don't add the 100ohm parallel source termination?

NEW UPDATE: Ok I did some more research today.. and got more confused..

First of all, TI has this notes about how to terminate differential signal: https://www.ti.com/lit/an/snla034b/snla034b.pdf?ts=1617704437563&ref_url=https%253A%252F%252Fwww.google.com%252F

It mentioned series termination on both Out+ and Out- for impedance matching.

Then I found this: https://www.sitime.com/api/gated/AN10029-Output-Termination-for-Differential-Oscillators.pdf

In the LVDS session, it mentioned double termination, which as my colleague/supervisor said, has parallel termination at both driver output and the receiver.

My only way to make sense of it is that in the TI document, it assumes the driver is a voltage source and in the SiTime document, it assumes the driver a current source..i know this is a stupid explanation..

it looks like most of the time impedance matching at the receiver will do the job, but if the driver has good enough driving power and we want a super clean signal, then we should add impedance matching at the driver too.

I'm not confident about my reasoning, it feels like i'm trying to just fit an explanation to all the things I've read. if anyone can clarify it a bit that'll be great. So my main questions are:

  1. If we want to do proper impedance matching, should there be source impedance matching as well? and if yes, should it be parallel or series or depends (depends on what?)?
  2. What is the purpose of the source impedance matching (if needed)? is it to stop signal bouncing back to the driver at the entrance of the tracks, or to prevent second round of bouncing?

Thanks everyone!!

  • \$\begingroup\$ Your instructor is wrong. Parallel terminations at (or past) the last receiver, series terminations at the driver. \$\endgroup\$
    – DKNguyen
    Apr 6, 2021 at 1:10
  • 3
    \$\begingroup\$ In a unidirectional bus parallel termination is commonly done at the receiving end only. For a bidirectional bus both ends is required. \$\endgroup\$ Apr 6, 2021 at 1:23
  • \$\begingroup\$ Per Andy aka's answer, the source terminator is only needed on bi-directional protocols (like RS485), because it's the terminator for when the bus is driving in the opposite direction. And yes, it means there's a higher load on the bus, but that's simply part of the design considerations. In a uni-directional high-impedance receiver situation (e.g. a single-ended logic signal at high-speed), you can use a series-source-termination instead of a parallel-receive-termination. \$\endgroup\$
    – Techydude
    Apr 6, 2021 at 10:11

3 Answers 3


Your supervisor is wrong. For the topology you've shown, the parallel termination resistor goes at the end of the run, furthest away from the driver.

If this is not done, the signal "sees" an open circuit at the end, and there is a 100% reflection from the open circuit back to the source. This causes the classic ringing seen on improperly implemented interfaces.

In order for this reflection to not occur, the parallel termination resistor needs to match or be close to the characteristic impedance of the trace.

There are a number of questions here on SE that address this issue.


This answer applies to current driving sources and high impedance receivers

  • If the only driving source is at one end of the line then, it doesn't need to use a source impedance. You can add the extra termination impedance but it wouldn't affect things other than to lower signalling levels.
  • If the only driving source was not at the end of the line then a termination is required at both line ends to prevent reflections.
  • If there are several driving sources (a la RS485) then terminations are needed at both ends of the line.

my colleague said that ideally there should be a 100ohm parallel impedance matching resistor at the driver output, to reduce signal reflection.

Line terminators are placed at the ends of the line and are not necessarily co-located where there is a driving source. If a driver is at the end of the line it needn't have a local terminator if it is the only driver on the line.


I just add a few considerations.

Line termination is necessary to avoid reflections, so that a bit of loading (burden) is acceptable to have the received signal more stable.

For short lines you do not need such ballasting because the through time is shorter than the typical time intervals of your signal. For fast 2-2.5 Gbps you have a bit duration of 100-150 ps, with an advised rise and fall time of about 30% of that. Considering a speed along your traces of bout 60 ps/cm (it depends roughly on the sqrt(diel.const)), you see that 2 cm are not impacting, because what matters is the total time, forth and back to thee source.

Correct matching values for the end resistor are of the same magnitude of the characteristic impedance of the transmission line.

As an add on, for Emitter Coupled Logic there was a Motorola app. note (I cannot find it now) suggesting some series resistance at the source, probably to better match the variable impedance of the source with the transmission line. Take into account in fact that the source "impedance" (that is a frequency domain concept, but consider we can define and measure it for every instant of time) changes during the excursion of the signal from 0 to 1 because the source circuit is non-linear.

Consider also that attenuation of the transmission line is higher for high-frequency components (above few GHz or so), and T.I. speculates on adding current-source drivers in parallel, with selective coupling using a series connected capacitor to beef up the high-frequency portion of the signal (rise and fall edges). [I did a similar one to drive laser diodes for a fast fiber optic connection]

In particular for ECL there was some effort to define a complete matching network that took into account differential mode (what we have considered so far), but also common mode (so with resistors terminating to the supply rails). See fig. 1-6 of ref 1).

One last note: as you see in particular i ref 2) the attention is for long cables, going outside your pcb. Also in ref 1) in sec. 3 there is an example with 40 m of transmission line. Short pcb traces are usually not troublesome and do not necessitate heavy ballasting/end matching.


  1. https://www.ti.com/lit/ug/slld009/slld009.pdf?ts=1617698002662&ref_url=https%253A%252F%252Fwww.google.com%252F
  2. https://www.ti.com/lit/ug/snla187/snla187.pdf?ts=1617698171822&ref_url=https%253A%252F%252Fwww.google.com%252F

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