Considering 74AUP1G07, I was wondering why this design, which I recently came across, supposed to be correct.
since I'm not allowed to share the schematic, I will describe it:
- on separate part of the schematic we have a signal "DDR_VTT_CTRL" that starts from an off-page connector, and passes through 0 Ohm resistor and ends with a wire named VDDQ_VTT_MEM_EN
- on another separate part, we have "DDR_VTT_CTRL" coming from an off-page connector, going through "A" input in 74AUP1G07. while from the Y input we have a pull up resistor where its node is connected to 0 Ohm resistor and ends with a wire called VDDQ_VTT_MEM_EN.
- Note: 74AUP1G07 is marked as EMPTY.
looks like DDR_VTT_CTRL and VDDQ_VTT_MEM_EN edges are shorting the whole device (while R10501 is 0 Ohm). what I am missing here?