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I have a design that is erroring at compilation time with (among other errors) a bunch of duplicate net name errors. I have searched around including reading up on the top result for this problem (changing the net identifier scope doesn't solve the issue and causes many more errors).

The error makes no sense in context. I have three power rails in this design (12V 5V and 3V3). The project is setup in a hierarchy (top level showing connections between all other sheets). Power from the power supply to loads is done using Ports. Each schematic uses Net Labels internally to connect the Input Port to various components.

The error occurs on all schematics that use Net Labels which I guess makes sense but the nets are supposed to have the same name since they are connected (but visually it would be messy to draw a wire between the two points).

How do I inform Altium that the duplicates are intended?

P.S. I apologize for what may be terrible grammer it is currently 2:23AM as I write this.

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You can change this in Project Options->Error Reporting ->Nets with multiple names.

The default is “Error” but you can change it to “No Report”

In the Options tab of Project Options you may then want to select “higher level names take priority” for the net options.

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Try unchecking "Allow Ports to Name Nets".

Sometimes it's also helpful to enable "Higher Level Names Take Priority" as well.

enter image description here

As a side note, it's often beneficial to make power nets global by using power ports. This typically makes schematics more legible, with less busy wires. Attaching a power port automatically makes the net global.

Connection Matrix, how I like it: enter image description here

Error Reporting, how I like it: enter image description here

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  • \$\begingroup\$ I had originally intended to use power ports instead of ports but some confusing project specs lead me to believe I would not be able to. I will likely switch back to power ports now. Thank you for the advice I'll test some changes to my design. \$\endgroup\$ Apr 10 at 5:37

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