Need a help with enumeration process, can't receive set_address from hub (PC). when answering to get device descriptor, getting reset but no set_address request only zero-length PKTSTS_SETUP_COMP-> PKTSTS_OUT_RECEIVED->PKTSTS_OUT_CMPL and reset from beginning.

  • 2
    \$\begingroup\$ Unfortunately it's impossible to debug your application with this much information. The first thing you need to do is using a logic analyzer on the USB FS line. Cheap Chinese analyzers can sample at 24 MHz, which is barely enough. They can sometimes catch the packets, sometimes not. But still they are better than being completely blind. \$\endgroup\$
    – Tagli
    Apr 9, 2021 at 17:00
  • \$\begingroup\$ You must be kidding me, USB is not a UART, USB its differential NRZI and have a lot of packet bits (may be dedicated usb analyzer). in any case i can receive a device descriptor so the PHY is fine, maybe if some one knows exactly how to write to TXfifo, some simple assembly code will be helpful. \$\endgroup\$
    – iva33
    Apr 9, 2021 at 17:15
  • 2
    \$\begingroup\$ I have successfully implemented custom class USB devices on STM32F4 OTG_FS hardware by using register level programming, without using Cube or HAL. I'm pretty sure that I do know what USB is. And you can definitely inspect USB line using a cheap analyzer, although it's not the best tool for the job. Reception of some request doesn't mean your code is bug free. I have lots of experience debugging serial comms, and believe me, you can't be sure about anything unless you probe the physical line. \$\endgroup\$
    – Tagli
    Apr 9, 2021 at 17:22
  • 1
    \$\begingroup\$ ST give example usb code. Whilst it is in C, you can either transliterate or inspect the generated asm code from the compiler. \$\endgroup\$
    – Kartman
    Apr 10, 2021 at 2:37

1 Answer 1


The right sequence in assembly (for stm32l4)

movw r9,#OTG_FS_L
movt r9,#OTG_FS_H   
add r8,r9,#TX_FIFO0_STR   ;(TX_FIFO0_STR  equ 0x1000)

mov32 r1,#(PKTCNT_CNT_1PACK+0x12)       ;1pac size 18
str r1,[r9,#OTG_DIEPTSIZ0_B]

ldr r1,[r9,#OTG_DIEPCTL0_B]
orr r1,#(EPENA|CNAK)
str r1,[r9,#OTG_DIEPCTL0_B] ;send prepare 

mov r1,#0x0112          ;len=18 +dev_id=1   
movt r1,#0x0200         ;rev=02.00
str r1,[r8]

mov r1,#0x01ff          ;Base Class=0xff=vendor SubClass=0x01 (xx)
movt r1,#0x4000         ;Protocol=0(0xx) + max_control=64
str r1,[r8]

mov r1,#0x0483          ;idVendor 0x0483
movt r1,#0x0001         ;idProduct 0x0100
str r1,[r8]

mov r1,#0x0203          ;release= 0x0203
movt r1,#0x0201         ;iManufacturer=0x01+iProduct=0x2
str r1,[r8]

mov r1,#0x0100          ;iSerialNumber= 0x00+ bNumConfigurations=1
str r1,[r8]

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