Given a power management IC (PMIC, datasheet), two lines are internally connected to the same low-dropout regulator (LDO).

One line is directly connected to the LDO, the other is a push-pull pulled internally to the LDO.

More details:

  • The LDO is fixed at 3.0V with a max 60mA (or 100mA, ambiguously).
  • The direct line (VCC_RTC) shares the LDO properties above.
  • The PWROK output line is a push-pull pulled to VCC_RTC.
  • Unpowered resistance between VCC_RTC and PWROK settles on 5MΩ (+ probe on VCC_RTC).
  • Unpowered resistance between VCC_RTC and PWROK is instantly 15MΩ (- probe on VCC_RTC).
  • Supply voltage is 5.0V.
  • Datasheet

My goal is to approximately simulate how applying an external voltage to PWROK affects VCC_RTC. To do that, I'm trying to simulate the internal push-pull.

Here is my attempt using ideal MOSFETs:

enter image description here

For those familiar with PMICs, what is a more realistic representation of this push-pull component when left normally high?

(If you're curious, I want to understand the effects of applying 3.3V to the PWROK line to see how the VCC_RTC line changes voltage and/or supply current.)


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