The HC-49 xtal is an 8 MHz crystal, and the radial crystal is an RTC 32.768 kHz crystal. C11, C12 are 22pF, and C13, C14 are 18pF.

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The traces go directly into a micro (a PIC24F.)

I tried to follow Microchip's guidelines on this, but they advised using surface mount xtals and talked about "guard rings" which are alien to me.

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    \$\begingroup\$ You have a trace from your crystal that runs very close to your RTC. This could result in not so great things. \$\endgroup\$ – Kellenjb Oct 25 '10 at 15:32

It's a good idea to return the ground for the feedback capacitors directly to the nearest ground pin on the MCU, to reduce emissions.

A guard ring is simply a track connected to ground. It shouldn't have any other connections made to it, as it shouldn't carry any current.

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    \$\begingroup\$ You forget to mention that the guard ring fully encloses the oscillator's components. \$\endgroup\$ – stevenvh Aug 7 '11 at 17:33

I realize you are using a through hole crystal, but the idea is the same.


In a professionally fabricated board I would have smaller vias allowing me to place more along my shield as well as some under my pic.

As a note, only 1 of the pins on the PIC is ground, but I went ahead and connected an IO pin to ground.

And as another note, it is not shown here, but I a full ground plane that my vias are connecting to.

  • \$\begingroup\$ This crystal is also a 4 pin, in the questions case, he does not need to ground out the extra 2 pins, but the layout should be similar. \$\endgroup\$ – Kortuk Oct 25 '10 at 14:40

Guard rings are a term used to describe low-impedance traces that surround or "guard" a high-impedance or sensitive signal. Usually the guard ring is a ground connection, but it can be any low-impedance signal.

A quick google search for "guard ring" with a few other terms (layout, crystal, oscillator) brought up several useful links such as this, this and this, among others.

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    \$\begingroup\$ I think this guard ring does the opposite. It is actually attempting to shield your board from the oscillator and reduce emissions. \$\endgroup\$ – Kortuk Oct 25 '10 at 15:05

I would move C13 and C14 to the right of the crystal.

I would also put more space between the oscillator signals and the RTC signals.

On C14, you have the trace going right through it. I've seen recommendations against this for thermal reasons. That pad will leak more heat and cause the solder to solidify differently. The recommended way is to put a small stub from the main trace to the pad.

  • \$\begingroup\$ I would be more concerned about em effects then thermal as the thermal differences will be very small in this case. \$\endgroup\$ – Kellenjb Oct 25 '10 at 17:10

General uC layout guidelines can be found in Atmel's AVR042 application note. I like it a lot and it has some good basic advice. Specifically it has guidelines on laying out the board with crystals in mind:


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