# Something is wrong with my Wien Bridge

I want to create a wien bridge oscillator to use in my later projects so I tried to simulate a schematic I found online. Its stated that R1 = R2 and C1 = C2 should be true in order to circuit to oscillate. Ironically, thats the only situation that my circuit does not oscillate. I chose C1 = 1uF and C2 = 1.1uF and that is the closest I can get to a clear sine wave. While C1 = C2 my circuit does not oscillate. I tried C = 1n which is useless too. I even tried charging one of the capacitors beforehand to kickstart the sim but it doesnt work either, the wave just flattens in time. If I remove C2 I get square wave which is more interesting. Later on I decided to try the working one (C1 = 1uF/1nF, C2 = 1.1uF/nF) on my bread board which didnt oscillate, but created a steady voltage. I formed a voltage divider and powered it with my dc power supply, used the middle node as my virtual ground. Im lost and I need help.

The minimum gain to start oscillation of a Wien Bridge Oscillator is three. So, if your circuit negative feedback resistors are in the ratio 2:1 then theoretically this is sufficient to start an oscillation.

However, it may take a year to build-up and, with slight losses (op-amps are not actually ideal) or tolerance issues on the two feedback resistors, then your oscillator may not start at all. For this reason, the feedback resistors need to be chosen such that your value for R1 is slightly greater than twice the value of R2.

Then it will start but then you'll encounter the next problem; the amplitude of the sine wave will continue to grow until the op-amp output clips the sinewave. And now you have a distorted sinewave which is not usually desirable.

For this reason, anyone designing a practical Wien Bridge Oscillator incorporates a variable gain stage that attempts to stabilize the amplitude at a fixed and fairly undistorted level. Traditionally this has been done with filament bulbs as per this wiki article: -

There is also this circuit that uses back-to-back diodes to slightly clip the sinewave as amplitude grows beyond a certain point: -

You can also use a JFET to provide amplitude stability: -

Picture from here.

• Thank you, I tried with a higher gain and it worker. I realized that when I choose C1 slightly higher than C2 ı get a clean sine wave without the clipping problem. How is this possible? Is this applicable to a practical application? I thought that since there is about %20 error rate in my capacitors, one of them must have slightly higher capacitance then the other but it doesnt work. Apr 13, 2021 at 9:06
• Also when I choose 1nF instead of 1uF, I get a very high frequency unclipped wave. This is both amazing and confusing. Apr 13, 2021 at 9:07
• The 741 is pretty crappy and it's likely there was some subtle distortion that you may not have seen that was slightly limiting the gain. Typical of this might be slew rate limiting of the sinewave i.e. making it appear slightly more triangular. In other words, there will be distortion that is limiting the gain. If you want a decent wideband oscillator use at least the back-to-back diode version AND use a decent op-amp and not a dinosaur. Apr 13, 2021 at 9:09
• Would 1458 be okay? I lack knowledge thus I dont know how the diodes affect the circuit in a good way. Im a student so I am still learning :D thank you. Apr 13, 2021 at 11:05
• Oh I had no idea I have to do that sorry. I am new. Apr 14, 2021 at 11:50

Total gain around the loop (loop gain) should be 1 at oscillation. There is a gain of 1/3 through the RC network which is why the negative feedback gain is required to be 3 at oscillation. 1/3 * 3 = 1.

But there needs to be a loop gain of greater than 1 at power-up in order to start oscillation and then reduce the loop gain to 1 when the required amplitude of oscillation is reached. Therefore the negative feedback gain needs to be greater than 3 at power-up and reduce to 3 when oscillation amplitude has grown to required amplitude.

One way of doing this is to use a jfet which will reduce the gain as the amplitude grows until the loop gain is equal to unity when the oscillation amplitude will be steady.

EDIT

The gain of the amplifier must be greater than 3 at power-up, reducing to 3 when the oscillation amplitude has grown to some significant level.

The JFET acts as a variable resistance. When the gate is equal in voltage to the source terminal voltage the JFET is at its minimum source-drain resistance.

The gain of the amplifier = 1 + (VR1/(resistance of JFET))

At power-up the JFET's gate is equal to the source voltage (C4 is discharged) and so the gain of the amplifier is at a maximum.

As the output oscillation grows in amplitude C4 is charged negatively by the amplifier's output via the diode, taking the gate of the JFET negative with respect to the JFET's source voltage which increases the effective resistance of the JFET, reducing the amplifier's gain.

The output oscillation amplitude will stabalise at a voltage where a balance is achieved. If the output were to increase any more, the gain reduces further reducing the output amplitude and if the output amplitude were to decrease, the gain increases, increasing the amplitude.

A steady state amplitude has been achieved, an equilibrium.

Perhaps you could do some reading around the subject of operation of JFETs to improve your understanding of this automatic gain control (AGC).

• I barely understand the logic of wien bridge, this circuit is far complex than I can understand ım afraid. I can assemble it ofcourse, but the point is learning so can you give me a more tuned down answer please? Thank you :) Apr 13, 2021 at 11:08