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I am learning computer architecture and organization. I am stuck in the following question. Can someone please help me?

The stage delays in a 5-stage pipeline are 300, 200, 100, 400 and 350 picoseconds. The second and third stages are merged into a single stage with delay 350 picoseconds. The throughput increase/decrease by ………… (percent).

This is what I tried:

  • Throughput of 1st case T1: 1/max delay =1/200
  • Throughput of 2nd case T2: 1/max delay= 1/350
  • %age increase/decrease in throughput: (T2-T1)/T1 * 100 = (1/350 - 1/200)/(1/200)*100
    = -42.8
    So the throughput decreases by 42.8%.

But the correct answer is given to be 0. I don't understand why?

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  • \$\begingroup\$ Where do you get the max delay value of 200 in the first case? (Also don't forget to multiply by 100 to convert fractions to percents, though this is not your problem here). \$\endgroup\$
    – Justin
    Apr 13 '21 at 15:12
  • \$\begingroup\$ What clock rate can you drive this thing at, before and after the optimisation? \$\endgroup\$ Apr 13 '21 at 15:20
  • \$\begingroup\$ @Justin The second and third stages are merged into a single stage the delay of them is 200 and 100. So the max delay is 200. \$\endgroup\$ Apr 13 '21 at 15:24
  • \$\begingroup\$ @user16324 I have given the complete question. \$\endgroup\$ Apr 13 '21 at 15:25
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    \$\begingroup\$ Do you have to look at the throughput of the whole pipeline or the stages which are being merged? \$\endgroup\$
    – Arsenal
    Apr 13 '21 at 15:41
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Improving throughput at the expense of latency

  • Delay: D = T + nδ
  • Throughput: IPS = n/(T + nδ)
  • Choose non-critical paths to merge in series to add latency but less than the critical path.

Now compute and see your critical path of 400 is not exceeded with 2 pipe merged in series, so the throughput is not changed, where latency δ can be different for each pipe rather than equal as shown above.

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