I am struggling getting my head around the input and output logic levels, mostly the output levels of this STM32 (STM32F446xC/E).

This table shows the output logic levels as dependent on if it is a CMOS, TTL, or something else which I don't know what kind of port. But how do I know if it is a CMOS, TTL or anything other? I can't find that information, only that all GPIOs are TTL and CMOS compliant, which I assume has to do with input rather than output.

Output logic levels table

What will be the output voltage levels? How do I know if my port is CMOS or TTL and thereby know which row of the table to read?

  • \$\begingroup\$ Page 117 "All I/Os are CMOS and TTL compliant (no software configuration required)". \$\endgroup\$
    – G36
    Apr 15, 2021 at 14:55
  • \$\begingroup\$ NOT possible for outputs to be TTL-compatible when \$V_{DD}\$ supply voltage is below +2.7V. \$\endgroup\$
    – glen_geek
    Apr 15, 2021 at 15:00
  • \$\begingroup\$ @glen_geek But how do I know if my output voltage will be a min. VDD-0.4 V or 2.4 V, as it depends on whether a CMOS or TTL port? \$\endgroup\$ Apr 15, 2021 at 15:03
  • \$\begingroup\$ Robin, there's only 0.1V difference between these. TTL outputs source a bit of current whereas CMOS outputs source NO current - this may account for the slight difference in these two specs. \$\endgroup\$
    – glen_geek
    Apr 15, 2021 at 15:12
  • \$\begingroup\$ @glen_geek Even more clarification from my side, how do I know whether my port is CMOS or TTL? It must be possible to know which of those specs that rule, no matter if it only is a 0.1 V difference. \$\endgroup\$ Apr 15, 2021 at 15:15

1 Answer 1


What will be the output voltage levels?

The first thing to do is choose Vdd, which for most designs is 3.3V (you can choose Vdd to be anything that is within the processors operational ratings in the datasheet)

Then you need to figure out what the load current will be on the GPIO of the STM32 (should not be more than 8mA sourcing and 20mA sinking there are also limits on how much the sum of sinking and sourcing current is for the whole part, if I remember right it's something like 25mA or 50mA for most STM32's (check the datasheet for your part).

If the Vdd is 3.3V as long as the current is less than 8mA the voltage of the port will be more than 2.4V (Voh) and this is guaranteed by the datasheet.

There is a good description here of digital logic levels: http://www.interfacebus.com/voltage_threshold.html

enter image description here Source: http://www.interfacebus.com/voltage_threshold.html

This is also good: https://www.allaboutcircuits.com/textbook/digital/chpt-3/logic-signal-voltage-levels/

  • \$\begingroup\$ That is, we can only know that the output voltage will be at least 2.4 V with a VDD of 3.3 V as it can be either CMOS or TTL driving the output? I that it can be both CMOS and TTL compliant as an input, the output is the more confusing part. \$\endgroup\$ Apr 16, 2021 at 9:37

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