I am using the Falstad simulator.
I do not understand why am I getting a DC current through a capacitor in simulation.
This must be an error from the simulator. Please, let me know if I am sane, I don't get why there is current flowing.
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\$\begingroup\$ wild guess: what's your time scale? Are you sure this is actually a constant current? (Hint: if I ask that way....) this really feels like you want to revisit how current through a capacitor depends on the time-dependent voltage. \$\endgroup\$– Marcus MüllerApr 16, 2021 at 17:36
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1\$\begingroup\$ Try to put a small resistance (0.1R) in series with the capacitor. And restart the simulation. \$\endgroup\$– G36Apr 16, 2021 at 18:13
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\$\begingroup\$ I'm suprised this works at all - Falstad won't let you connect a direct-cap loop like that. You can post the sim by using "export as link" then pasting the long URL as a link reference. Then we can have a go and see what it's doing. \$\endgroup\$– hacktasticalApr 16, 2021 at 18:34
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\$\begingroup\$ Nothing beats letting out the magic smoke for real. Because you rely on creating things from formulas, than guess the part and simulate it. \$\endgroup\$– David MikeskaApr 16, 2021 at 19:18
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1 Answer
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Looks like you found a convergence corner case.
- Cap directly connected to voltage source: Falstad detects the cap loop and says no.
- Cap connected via ground: Falstad doesn't detect the loop, oscillates (what you're seeing.)
- Cap connected via resistor to ground: Varies. Below 100 mohm, won't settle down. Above 100 mohm, converges.
Here's my sim (clicky here):
Point being, avoid direct capacitor (and inductor) loops to fixed sources. These always cause trouble with SPICE and its derivatives.
answered Apr 16, 2021 at 18:52
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\$\begingroup\$ Convergence is hard. Since it's been distilled into a simple test case, the OP may want to report this bug to Falstad so they get a chance to fix it. For the CircuitLab circuit simulator we've been able to permanently fix many convergence issues from user bug reports over the years. Most recently 3 weeks ago thanks to an EE.SE question. \$\endgroup\$ Apr 16, 2021 at 19:33