Even though the electronic device is powered off, isn't there a risk of doing a continuity test on connections in the middle of the circuitry ? I mean, you do apply voltage doing so - couldn't that harm the components? Or is the voltage too low?
Continuity testing of an in-circuit component is not a reliable procedure, independent of signal injection and its associated risks.
The component leads may be interconnected via other circuit elements, thus giving a false continuity result, where the component itself is actually not a conductive route.
Regarding the risks of introducing a voltage through the multimeter leads:
- Yes, there is a risk of certain parts being damaged, especially parts that can not tolerate the 1 to 9 volts that a multimeter might deliver across the probes in continuity mode.
- The above is especially true when the component (or other components on connected traces, which will also be affected) is not powered. Many parts can tolerate voltages when powered but not otherwise.
- To minimize the voltage, an option is to use the multimeter in resistance mode, at the lowest resistance setting - The higher resistance scales work on higher probe voltage, going by a quick check on a couple of multimeters at my desk.
- Note that basic multimeters often combine continuity and diode testing modes, so the voltage is at minimum sufficient to forward bias silicon diodes and perhaps LEDs. This means a voltage of 2 to 3 volts.
In summary: This is best not done unless the experimenter is open to the risk of damaging the device in question - not just the component being tested, but other parts of the board.
Late to the game.
The safe assumption is that DMM testing poses a risk to the HW under test. Rather than ask why it may be risky, the proper question should be, why isn't it?
The first things to validate are current and voltage clamps. If these are not enveloped by maximum part ratings, not just for the ref des under test, but for any component exposed to stimulus, do not test.
Autoranging also introduces potential for HW damage to components, even if not being tested directly. For instance, if you're testing a resistor with a current-source test, under autoranging, the probes will be driven to their voltage clamps prior to being placed on test points (under current-source testing, voltage is the variable being driven to deliver the specified current; in an open conditions, no current can be delivered, driving voltage to maximum @ clamp). If that voltage exceeds the rating for any component on the same net, it may be damaged. Transients are also produced when the applied current is modified to bring the test value within range.
Also, current/voltage clamp ratings for DMMs are given as steady-state values. You actually have to measure worst-case transients for any DMM to ensure HW safety, which are never part of the specs.
Another issue is latent damage; you may alter the operating lifespan of components exposed to test stimulus without ever knowing it. Your assembly may pass functional test and burn-in without any issues presenting themselves, but electrical stress can still manifest as component failure before the operational lifespan of your assembly has run its course (lawsuit pending).
In short, if you're working with deliverable assemblies rather than engneering models, you should ask yourself why DMM probing is allowable rather than the opposite. If you're a hobbyist doing some tinkering and require validation from measurement, be careful that the stimulus signal doesn't smoke your parts (not literally), or introduce the potential for altering their expected values due to electrical stress.