# Input protection for instrumentation amplifier

There were a few concepts mentioned in the Input Protection Basics from A Designer's Guide to Instrumentation Amplifiers, page 5-5 that I don't quite understand:

1. Why direct transient to power supply with diode?

The internal diodes (D1-D4) are there to raise the DC overload and to protect the input of Q1 or Q2 from transient (or ESD). But wouldn't a positive (or negative) transient direct a large current to $$\ +V_S \$$ (or $$\ -V_S \$$) and damage the power supply? Shouldn't they have decoupling capacitors to direct these transients to ground instead of going through $$\ +V_S \$$ or $$\ -V_S \$$?

2. Do the internal input resistors reduce the input impedance?

The +IN and -IN inputs to an IA should see a very large input impedance in the $$\ M\Omega \$$ range (i.e. the non-inverting input of an op-amp buffer). But the input circuitry implies each input sees an impedance of $$\ 400\Omega + r_\pi\$$. Even at 6mA max input current, $$\ r_\pi = {V_T \over I_B} = {0.026V \over 6mA} = 4.33\Omega\$$. There are no resistor on either emitter side to get multiplied by $$\ (\beta +1) \$$. Total input impedance would just be $$\ 404.33 *2 = 808.66 \Omega \$$!

I'm confused ... IA should have high $$\ M\Omega \$$ input impedance, but the input circuitry indicates a mere $$\ 800\Omega \$$ input resistance. (I'm not sure if it has to do with Q1 and Q2 being biased by constant current source at the collector, and that somehow fixes the current into the base at a constant value? If so, the 400$$\ \Omega \$$ would be pointless...)

If $$\ 6mA * 400\Omega \$$ raise the voltage by 2.4V, then shouldn't a 1k$$\ \Omega \$$ raise the voltage by 6V? But the book states 22.5V. I'm not sure if that's a typo or if I've mistaken something here...

But wouldn't a positive (or negative) transient direct a large current to +VS (or −VS) and damage the power supply?

Yes and that's why there needs to be a clamp (sometimes called "crowbar") circuit between the supply rails (so between +Vs and -Vs). Such a circuit can be voltage triggered or edge triggered (ESD events are fast pulses). When triggered such a clamp shorts the supply rails so that the voltage beween +Vs and -Vs is limited.

Should't they have decoupling capacitors to direct these transients to ground instead of going through +VS or −VS?

Yes and those decoupling capacitors will definitely help but when the IC isn't soldered in a circuit yet, there are (almost) no decoupling capacitors. On a chip only small capacitors can be made (100 pF is already a lot) and that's by far not enough for proper ESD protection.

Do the internal input resistors reduce the input impedance?

No, they only slightly increase it, actually by so little that it does not matter.

Your assumption that the input impedance is 400 ohm + $$\r_{\pi}\$$ would only be correct IF the emitters of Q1 and Q2 were grounded, which they are not.

From the drawn circuit you can only guess the differential input impedance which will be roughly (sucking thumb, too lazy to do proper calculation) $$\\beta * R_G\$$.

If so, the 400Ω would be pointless...

Then those 400 ohm resistors would not be there now would they. They do serve a purpose, they limit the current when the the diodes D2, D3, D4 conduct. Without the 400 ohm resistors, the full ESD event voltage would be on the base of Q1 and Q2 destroying them immediately. The same applies for an overvoltage situation. D2, D3, D4 can only protect as long as the current through them is limited and that's what the 400 ohm resistors take care of.

But the book states 22.5V.

The book states "22.5 V above each supply" which seems excessive, this is indeed probably a typo.

• When triggered such a clamp shorts the supply rails so that the voltage between +Vs and -Vs is limited <-- I'm not sure what that means. Say if a +50V transient enters +IN and ±Vs=±5V, then there'll be a potential of 50V-5V-0.7V = 44.3V between +IN and +Vs, there are not resistors in between and the only resistance there is could just be a few ohms of source impedance from +Vs, say 2Ohm ... and there'll be a 22A of current flooding into the +Vs. I'm sure the battery or the power supply would be damage. Hence my question of not seeing how the diodes take out the transient at +IN or -IN
– KMC
Apr 20, 2021 at 15:34
• Say if a +50V transient enters +IN and ±Vs=±5V, then there'll be a potential of 50V-5V-0.7V = 44.3V OK, but that assumes that the 50 V transient can supply an infinite amount of current. You can't protect against that without blowing a fuse / resistor/ diode. ESD events are high voltage but the current spike is very short and there is also series resistance (read: electronicdesign.com/power-management/article/21799383/… ) that limits the current. Apr 20, 2021 at 17:16
• The purpose of a supply clamp is to limit the voltage across the supplies upto a certain current. In a typical ESD event that current can be a few Amps for a very short time (in the order of less than 1 ms). If you put a 50 V, 100 A supply between the pins then there's nothing that the protection can do to prevent too much current flowing so the IC will be damaged no matter what. Apr 20, 2021 at 17:18