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I am looking to protect an INA849 at 2000 or more gain from high voltages of 30 volts AC at various frequencies. Currently I am using an analog switch IC as the only time the high voltages are sent through the sockets are when the microcontroller commands it, so the INA input pins will be disconnected with IC4 and IC6 when sending the high voltage. An interrupt on the ADC microcontroller pin (net name: Out) will also tell the microcontroller to disable IC6 and IC4 (net name Input Switch) when an overvoltage or undervoltage is detected on the ADC pin. (ADC is set to middle of range, 3.3v microcontroller and ADC, 1.6v on REF pin)

Questions:

  1. Is this a suitable protection technique? Should I go for the much more simple (and cheaper BOM-wise) Zener diode approach? I cannot find any schematic for protecting a high gain amp from anything more than electrostatic discharge, or the example in the datasheet with capacitor isolation which will of course remove DC amplification. I can do this if I absolutely must, but I would much rather be able to measure DC as well.
  2. Will signal integrity be an issue going through these analog switch ICs? Is there a better way to save signal integrity with these voltage transients? Would solid state relays be a better option in place of IC4 and IC6? Would traditional diode and resistor protection be better? (as seen in ADC protection area of the circuit) If so, would zener diodes or a sinkable power supply with Schottky diodes be the best solution for protection?
  3. Will this be suitable protection from ESD? this will be a device where the sockets are exposed to human contact.(disregard the safety of the high voltage, that won't be an issue as voltages are not sent during socket contact)

Thanks in advance for any potential insights into these issues.

Schematic

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  • \$\begingroup\$ Your specs are not clear to me for Vac (pk or RMS or pp). Delayed protection might not be fast enough so it is better to put series current limiting resistors and a diode clamp like CMOS with 10k> diode>10k>diode to each rail for addition protection (the 2nd diode must be Schottky) or R >TVS bipolar clamps to gnd less than V+,V-. \$\endgroup\$ Apr 23 at 23:59
  • \$\begingroup\$ Thanks for the response @TonyStewartEE75 . That's a good idea. I would rather not spend extra time programming and relying on delayed protection. The Vac is from a DPU01L-15, so peak current is +-15V and 33 milliamps. Will the diodes and resistors add significant noise to the amp input? \$\endgroup\$ Apr 24 at 0:48
  • \$\begingroup\$ Beware of the reverse leakage of D2 & D3. NXP datasheet says max 10uA. Along with R6 this may introduce temperature related errors into your measurement. \$\endgroup\$
    – Kartman
    Apr 24 at 4:21
  • \$\begingroup\$ Good point @Kartman. Thanks for the input. I'm currently looking at instrumentation amps made by analog devices as they have more robust input pins which is crucial in my application. Reduced energy consumption is a nice bonus as well. Do you have any recommendations for better output clamping techniques? Keeping such a large range of voltage in 0-3.3v looks to consume tons of current which can't be good for the amp or battery life. \$\endgroup\$ Apr 25 at 1:43
  • \$\begingroup\$ Your schematics is confusing. 1st) The ANA switches have NO/NC input and COM output, but you swapped this?? 2nd) By using R4,R5,R8 makes the IA to loose its principle. Why would you need this? \$\endgroup\$ Apr 25 at 19:54
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The correct way:

R1 and R2 are the same, tight tollerance are used to limit the input current to the IA, if the last already has built-in protection ESD diodes. If your IA doesn't have the built in diodes, you have to add them externally. NOTE that diodes have quite large leak current, so probably you won't find any suitable (best option is Interfet Picoamp, FJH1100, BAV199 ). However you can replace the diodes wit JFET transistors and you can get leaking current as low as hundred femto amps.

The C1,C2 with R1,R2 form a lowpass filter. C1 and C2 have to have a tight tolerance and low temp. coef. like C0G/NPO. C3 with R1 and R2 forms a filter to reduce the mismatch of components R1,R2,C1,C2. C3 = 10 x C1/C2. Source figure 5-24

schematic

simulate this circuit – Schematic created using CircuitLab

schematic

simulate this circuit

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