0
\$\begingroup\$

Here I have taken a differential BJT pair. Both the individual gains are different and the output differential gain is also different.

BJT differential amplifier pair

Is there a problem with my circuit? Why is it happening?

\$\endgroup\$
7
  • \$\begingroup\$ Your circuit is fine, but your math is questionable. How exactly are you calculating Gain(2)? \$\endgroup\$ – Dave Tweed Apr 25 at 10:58
  • 1
    \$\begingroup\$ 1) the transistors don't have "gain", they have transconductance. 2) You don't have to design a diffpair such that the transistors have the same transconductance 3) You're applying 50 mV at the left and 30 mV at the right, why? The "normal" way to use this amplifier is to feed it a differential signal. You're feeding it the difference between 2 sinewaves so you get a 30 mV differential signal with 20 mV common mode. You're making things quite complex. \$\endgroup\$ – Bimpelrekkie Apr 25 at 10:59
  • \$\begingroup\$ 4) Gain as in voltage gain comes from the combination of the transconductance of the transistors and the load resistors at their collectors (here R1 and R2). \$\endgroup\$ – Bimpelrekkie Apr 25 at 11:00
  • \$\begingroup\$ Did you use matched transistors, or any old pair from the parts bin? \$\endgroup\$ – user_1818839 Apr 25 at 11:10
  • \$\begingroup\$ There are no emitter resistors to balance the gain when two non-identical transistors are used. \$\endgroup\$ – Justme Apr 25 at 11:35
1
\$\begingroup\$

The differential pair is one amplifier, not two.

The two sides are linked by sharing a single emmitter resistor, because of this a signal on one side has an inverse effect on the other side.

\$\endgroup\$
1
\$\begingroup\$

To top up on Jasen's answer and previous comments:

i) the differential amplifier is, namely, an amplifier, with a gain that is defied for differential mode and for common mode; it is usually used for diff mode, so the Vout (difference of collector voltages) is ratioed to the input voltage (the voltage applied to the two bases, from which the comment from Bimpelrekkie)

ii) the gain is given basically by gm*Rc for each arm, combined by the fact that the total current is constant as the two emitters join in common point, where the resistor R3 is connected (or, better, a current source; this for a matter of impedance ad rejection of common mode)

iii) what the amplifier does is to "reject" common mode in favor of diff mode e(that is the signal you want to process, contrasted to the external interference that is assumed common mode). So you either increase the diff mode gain, or you reduce the common mode gain, or both, resulting in a large Common Mode Rejection Ratio (CMRR) = Gain(dm)/Gain(cm)

iv) If you apply different AC signals you have a "strange" (or "unwanted") behavior, possibly where the two BJTs have different transconductance gm. Try to apply 1 signal between bases and they should share the signal 50-50.

v) The if I understand right you have VcCC=10V and VEE=10V too (but reversed in polarity). If you do not bias correctly the BJTs applying even a tiny AC signal to the BJTs results in a wide change of the operating point and they will not operate in the linear region. First:check operating points with bias voltages and currents. You should be above ground for the moment, with all bis voltages positive with respect to that. Then try the following: VCC=+20V, VEE=+10V, R3=10k, so you have 1mA total bis current. When you apply 0V as AC signal there must be 0.5mA o each side; then, as a balance, when you apply a tiny DC signal between bases, you will see a shift of DC current. If the signal is AC you do not see the result in the bias voltages and currents (thinking of calculating with Spice), but purely in the behavior as amplifier.

\$\endgroup\$
1
\$\begingroup\$

In order to check the proper functioning of the circuit, I recommend the following steps:

1.) Connect both input nodes to ground and verify if there is proper DC bias point

2.) Set one of the inputs to zero and check if the output signals at both collector nodes are equal in magnitude but opposite in the phase.

3.) Do the same with the other input node(s).

4.) In both cases, the gain should be app. A=(+-) 0.5 gm Rc. This gain expression results simply from the following view:

  • Output T1 (T2) and input at T2 (T1): The whole circuit forms a two-transistor chain - a common-collector-common-base combination.

  • Output T2 (T1) and input at T2 (T1): Classical common-emitter stage(s) with emitter feedback.

5.) If everything is as expected, you can perform some analyses with two inputs at the same time.

\$\endgroup\$

Not the answer you're looking for? Browse other questions tagged or ask your own question.