5
\$\begingroup\$

Do excuse my lack of knowledge on the subject, but on the Opendous JTAG schematic there are two 74LCX125 IC's. The datasheet refers to them as Low Voltage Quad Buffers, but I don't fully understand what the purposes are of these chips in the Opendous JTAG circuit.

Also, what are other common uses for these ICs?

enter image description here

\$\endgroup\$
12
\$\begingroup\$
  1. To increase drive capability. A microcontroller I/O pin might only be able to source or sink 8 mA (for example). A buffer chip might be able to source and sink 64 mA. If we want to drive a long wire, or have large fanout to many receiving chips, the we have a large capacitive load and we might need to use a buffer to maintain fast rise and fall times.

  2. For robust receiving of off-board signals. The buffer chip may have higher gain, so be able to receive signals coming in over a long wire, even if that wire attenuates the signals significantly. The buffer chip may also have more robust ESD protection than a microcontroller or FPGA I/O, in which case using it also provides some reliability improvement over connecting directly to a complex circuit.

Of course you need to compare the relevant datasheets in your circuit to see if either of these scenarios applies.

| improve this answer | |
\$\endgroup\$
  • \$\begingroup\$ I thought the purpose of a buffer was your first point above. That is, the input is simply passed through to the output. What do you mean by the buffer may have higher gain? If the input to a long wire was logic HIGH and the wire resistance attenuated the signal such that it was ~LOW (below the threshold), then the output of the buffer would then be LOW as well, right? Where does gain come in? \$\endgroup\$ – sherrellbc Jul 25 '14 at 12:51
6
\$\begingroup\$

I agree with everything The Photon says. Also I'd like to add:

  1. This particular buffer has 5V tolerant inputs and outputs, but is designed to be supplied by 2.3V-3.6V. Applying a higher voltage (like 5V) to a microcontroller or logic IC designed to work at a lower voltage (3.3V is common) would ordinarily be operating the device outside its specifications, but this buffer expressly says it can tolerate up to 7V. So, it could be used to interface a 5V signal to lower voltage logic.

  2. Also, this buffer features tri-state buffers. This allows them to either pull the voltage low, or high, or a 3rd "high impedance" state where it does neither; the output is effectively disconnected. This is most useful when there are multiple devices communicating on the same line: one device is selected to drive the line at some time, and all the other devices enter high-impedance mode so they don't fight each other.

| improve this answer | |
\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.