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If you overclock a microcontroller, it gets hot.

If you overclock a microcontroller, it needs more voltage.

In some abstract way it makes sense: it is doing more computation, so it needs more energy (and being less than perfect, some of that energy dissipates as heat).

However, from a just plain old Ohm's law level electricity and magnetism, what is going on?

Why does the clock frequency have anything to do with power dissipation or voltage?

As far as I know, the frequency of AC has nothing to do with its voltage or power, and a clock is just a super-position of a DC and a (square) AC. Frequency doesn't affect the DC.

Is there some equation relating clock frequency and voltage or clock frequency and power?

I mean does a high speed oscillator need more voltage or power than a low speed one?

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    \$\begingroup\$ Thanks for the great answers. One critical bit I was missing is that (1MHz Atmel style) CMOS doesn't actually use much current when it is not doing anything. TTL does tend to use current all the time, and that is more what I was picturing. I really like the capacitor charging answers; this gives a much clearer reason why "calculations" should require energy. I wish I could accept multiple answers. \$\endgroup\$ – Jack Schmidt Oct 25 '10 at 19:54
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Voltage required is affect by significantly more than clock speed, but you are correct, for higher speeds you will need higher voltages in general.

Why does power consumption increase?

This is a lot messier than a simple circuit, but you can think about it being similar to an RC circuit.

RC circuit equivilent

At DC an RC circuit consumes no power. At a frequency of infinity, which is not attainable, but you can always solve this theoretically, the capacitor acts as a short and you are left with a resistor. This means you have a simple load. As frequency decreases the capacitor stores and discharges power causing a smaller amount of power dissipated overall.

What is a microcontroller?

Inside it is made up of many many MOSFETs in a configuration we call CMOS.

If you try to change the value of the gate of a MOSFET you are just charging or discharging a capacitor. This is a concept I have a hard time explaining to students. The transistor does a lot, but to us it just looks like a capacitor from the gate. This means in a model the CMOS will always have a load of a capacitance.

Wikipedia has an image of a CMOS inverter I will reference.

CMOS Inverter Schematic

The CMOS inverter has an output labeled Q. Inside a microcontroller your output will be driving other CMOS logic gates. When your input A changes from high to low the capacitance on Q must be discharged through the transistor on bottom. Every time you charge a capacitor you see power use. You can see this on wikipedia under power switching and leakage.

Why does voltage have to go up?

As you voltage increases it makes it easier to drive the capacitance to the threshold of your logic. I know this seems like a simplistic answer, but it is that simple.

When I say it is easier to drive the the capacitance I mean that it will be driven between the thresholds faster, as mazurnification put it:

With increased supply drive capability of the MOS transistor also increases (bigger Vgs). That means that actual R from RC decreases and that is why gate is faster.

In relation to power consumption, due to how small transistors are there is a large leakage through the gate capacitance, Mark had a bit to add about this:

higher voltage results in higher leakage current. In high transistor count devices like a modern desktop CPU leakage current can account for the majority of power dissipation. as process size gets smaller and transistor counts rise, leakage current becomes more and more the critical power usage statistic.

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    \$\begingroup\$ couples things i would add: higher voltage results in higher leakage current. In high transistor count devices like a modern desktop CPU leakage current can account for the majority of power dissipation. as process size gets smaller and transistor counts rise, leakage current becomes more and more the critical power usage statistic. \$\endgroup\$ – Mark Oct 25 '10 at 21:25
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    \$\begingroup\$ Secondly, higher voltage allows transistors to switch more rapidly because of how capacitors charge. We know that a capacitor will charge to 63% of the input voltage in 1 time constant, well if we raise the input voltage then 63% of that voltage is obviously higher as well meaning the transistor will take less time to charge to the ON voltage for the transistor. So the higher voltage doesn't make switching easier, but rather faster. \$\endgroup\$ – Mark Oct 25 '10 at 21:29
  • \$\begingroup\$ I meant faster when I said easier. Let me correct that and add your extra quote. \$\endgroup\$ – Kortuk Oct 25 '10 at 21:32
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    \$\begingroup\$ The part about why increased voltage decrease switching time is not correct. The threshold of the CMOS gate will change with supply voltage too (and within reasonable supply range will be more or less equal to constant fraction of the supply - for example 50%). As percentage change of the voltage do not depend on the supply (one RC will always be ~63% regardless supply) this is not the reason why supply does meter. With increased supply drive capability of the MOS transistor also increases (bigger Vgs). That means that actual R from RC decreases and that is why gate is faster. \$\endgroup\$ – mazurnification Jan 25 '11 at 19:36
  • \$\begingroup\$ @mazurnification, I honestly could not remember why, and took what someone said they knew. I figured it someone knew better they would come drop it. Your explanation makes sense to me and I have edited it in. \$\endgroup\$ – Kortuk Jan 28 '11 at 19:17
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In general, CMOS gates only use current when they switch states. So the faster the clock speed is, the more often gates are switching, thus more current is switched, and more power is consumed.

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  • \$\begingroup\$ This does not make sense if you think about it. Consider an arbitrary computation requiring some 10 clock cycles to complete. If your operating frequency is 10Hz, then it takes one second to finish and you have consumed however much energy was required in the process. However, if your clock frequency was just 1Hz, it would take 10 seconds (10 times longer), but at each clock you would only consume 1/10 the amount of energy - energy consumption is directly proptional to switching frequency. Therefore the overall power consumption is precicely the same. \$\endgroup\$ – sherrellbc Aug 6 '14 at 13:33
  • \$\begingroup\$ So really, more power per time is being consumed at higher frequencies, but overall there is no net either way. \$\endgroup\$ – sherrellbc Aug 6 '14 at 14:02
  • \$\begingroup\$ @sherrellbc For that one calculation, the power would be the same whether it was stretched out over 10 seconds at a lower frequency or executed in one second at a higher frequency. In fact this principal is used to save power in battery-operated devices. But the power for one second at high frequency is 10 times the power in one second at low frequency -- that's why the chip gets hot at the higher frequency, and requires 10 times as much power to drive it. \$\endgroup\$ – tcrosley Aug 6 '14 at 16:31
  • \$\begingroup\$ That was precisely my point. The power consumed per time is increased and consequentially the device is going to heat up as this energy is expended. I was merely stating that the overall power consumption when compared on level ground (i.e. equivalent computation completed on both devices) will be exactly the same. The higher frequency device is going to heat up more since the heat has less time to disspitate than in the latter slower operating device. I suppose in short the point is simply that both devices would consume exactly the same energy just over different time intervals. \$\endgroup\$ – sherrellbc Aug 7 '14 at 12:06
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Well, it's all about logic level transitions.

When any single bit of an output changes... the electrical value must slew from high to low, or low to high. This pulls power from the power supply, or dumps some power back onto the ground plane. It also generates a little waste heat due to inefficiencies.

If you increase the clock rate, you increase the number of these transitions per unit time, therefore you use more power to feed these logic level transitions.

Increased voltage requirements are a little different. The time it takes a signal to transition from low to high is called the rise time. To safely operate at any given frequency the logic must be able to consistently make this transition before the next clock samples the new value. At a certain point, the logic will not be able to meet the rise time requirements of a particular frequency. This is where upping the voltage will help, as it decreases rise time.

Heat is fairly simple. The chip is designed to handle a certain amount of heat generated by a certain clock rate. Increase the number of transitions by increasing the clock rate, and you're going to get more waste heat. When overclocking, you can easily outpace the cooling system's ability to remove that heat.

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Think of a basic RC circuit where the R and C are in parallel. Our goal is to have a clock at the output of this circuit - a 0-5V 1KHz square wave. So when we want the clock to be high we turn on our voltage source and it charges up the capacitor until the output is at 5V, and when we want 0V we turn it off and let it discharge. The charge/discharge time is determined by the RC constant of the circuit. There's a problem - the circuit doesn't charge up quick enough for a 1KHz clock. What do I do?

We can't change the RC constant of the circuit - it's fixed. So we have to charge the capacitor up quicker somehow, but still have the same charged voltage. To do this we need an active circuit that monitors the output voltage of the RC circuit and varies the current going into the capacitor to charge it up quicker. More current means more power.

When you want a faster clock, you need to charge up the capacitor faster. You charge up a capacitor by pushing current into it. Current * voltage = power. You need more power!

Everything in a digital system is tied to the clock and everything has capacitance. If you have 100 TTL chips on one clock it has to drive a lot of current to charge all of them, then draw a lot of current to pull them down. The fundamental reason ohms law isn't holding is because these are active devices, not passive. They do electrical work to force the clock to be as close to a perfect square wave as possible.

If you overclock a microcontroller it gets hot

Yes - quicker change means more current flowing and power is voltage * current. Even if voltage stays the same, current used increases, so more power dissipation, more heat.

If you overclock a microcontroller it needs more voltage

Partially true - it needs more power, not necessarily more voltage. The microcontroller is in some way converting the extra voltage to more current to achieve its needs.

As far as I know, the frequency of AC has nothing to do with its voltage or power, and a clock is just a super-position of a DC and a (square) AC. Frequency doesn't affect the DC.

Only for a purely resistive load. There's a lot of trickery happening with AC power.

Is there some equation relating clock frequency and voltage or clock frequency and power?

Probably not a consistent one, but it's related to the simple equations Q=CV, V=I*R, P=I*V

Just remember: Higher frequency => faster rise time => must fill up capacitors quicker => more charge => more current => more power.

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  • \$\begingroup\$ I think it is more accurate to say you are filling and emptying them more often, not to saw you are doing it faster. It is only when you get close to their frequency you increase voltage. \$\endgroup\$ – Kortuk Oct 27 '10 at 1:34
  • \$\begingroup\$ I think you know what you are saying, but I just wanted to be clear in a comment about how you were comparing it. \$\endgroup\$ – Kortuk Oct 27 '10 at 1:34
  • \$\begingroup\$ At higher frequency you HAVE to do it faster - you can't afford a slow ramp because your square wave may turn into a triangle wave if it's too slow. Doing it more often also makes it worse but that's AC power, and it confuses me :) \$\endgroup\$ – AngryEE Oct 27 '10 at 13:05
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Power = switching factor * Capacitance * (VDD^2) * frequency.

As the fast clock has higher switching factor, and also higher frequency, thus higher dynamic power consumption.

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