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I am using three phase half bridge inverter to power a PMSM motor and bootstrap for the high side MOSFET.

The schematic is in attachment. Gate driver is Si8273, MOSFET is IPT015N10N5. But when I measured the high side signals, I got pretty high ringing during turn-on. The measured points in attachment was between phase output and HV_GND(I know I should measure between gate and source). The measurement between high-side gate and source (phase output) is shown in attachment VGS.

What I am expecting from the VGS is a square curve to 60V, but as we can see is a 12V signal with ringing.

Maybe can someone give me some advice where the problem is, and how it occurs.

Thanks so much in advance.


The layout is pretty complecated, I cut one half-bridge for you guys to discuss. The red arrow is on the VCC-layer for the HV_48V as DC-Link supply; the yellow arrow is on the GND layer; the green arrow is on both top and bottom layer for the phase. Between the green arrows is a Hall-effect current sensor.

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  • \$\begingroup\$ "What I am expecting from the VGS is a square curce to 60V" - No, that would kill your MOSFET, which has a max. Vgs of +-20V. You should see (approximately) the 12V you charge the bootstrap capacitor with on the top MOSFET Vgs. The ringing might be due to poor PCB layout and/or measuring techniques - show your PCB/setup. \$\endgroup\$ Apr 29 '21 at 17:20
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    \$\begingroup\$ Where do you see "damping"? I see a lot of ringing in your 'scope traces... \$\endgroup\$
    – brhans
    Apr 29 '21 at 17:25
  • \$\begingroup\$ ah, then I meant ringing... \$\endgroup\$
    – Minglu
    Apr 29 '21 at 18:17
  • \$\begingroup\$ If you post your layout we can indicate if that is the problem. I don't see anything inherently wrong with the schematic. \$\endgroup\$
    – Aaron
    Apr 29 '21 at 19:31
  • \$\begingroup\$ The layout itself is pretty complecated, actually this is not my first inverter, but such a bad ringing problem is first time for me. I cut one part of my layout for you guys. But I think, I realized where the problem is, but I am still happy and glad to know what do you guys suggest. \$\endgroup\$
    – Minglu
    Apr 29 '21 at 19:49
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The circuit is functional. I think you mean "ringing" instead of "damping" which is occurring on your traces.

When you pull down (power the low side FET Q3), capacitor C3 is charged through D3 to 11+ volts (12V minus the diode drop). C13 becomes the voltage source for the drive for Q2, and when Q3 is released and Q2 is turned on, C13 rides on the rising output voltage, maintaining a voltage high enough above HV+48 to keep the FET turned on.

Your ringing problems are caused by the inductance in this circuit. You need short, wide traces to keep inductance low; what you have is a classic example of too much stray inductance. When Q3 is turned on, GNDA has a low impedance, but when it is released, the stray inductance and the component capacitance form a resonant circuit.

You have cut a a section of the schematic that fortunately shows all of the very traces that must be kept short and wide. Don't neglect the path from HV+48V and back to ground from your power source. Silicon Labs makes an evaluation board for this part; you can get the data sheet to see an example of how a good layout is accomplished.

Good luck!

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  • \$\begingroup\$ Doesn't the wide trace have more inductance than narrow? \$\endgroup\$ Apr 29 '21 at 18:30
  • \$\begingroup\$ The traces must be wide to handle the high instantaneous currents and high frequencies. Think about skin effect and you'll see what I mean. I should also have said to avoid parallel traces on adjacent layers, which can make a capacitor. \$\endgroup\$ Apr 29 '21 at 18:35
  • \$\begingroup\$ +1 Looking this spok.ca/index.php/resources/tools/106-traceindcalc it seems that a trace has to be as close to the ground plane and as wide as possible, but then a compromise should be taken, because the capacitance grows with inverse. \$\endgroup\$ Apr 29 '21 at 18:42
  • \$\begingroup\$ Good resource! Note that this is for low frequency inductance. Switching just happens so darn fast these days. \$\endgroup\$ Apr 29 '21 at 18:48
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    \$\begingroup\$ Is it a real problem with a circuit or just scope measurement issue? \$\endgroup\$
    – fifi_22
    Apr 29 '21 at 18:56

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