I have seen the term Register Transfer Language being used as the expansion of RTL in the context of Hardware Description Languages (HDLs). Specifically over here: https://www.cl.cam.ac.uk/teaching/1011/SysOnChip/socdam-notes1011.pdf (Lecture notes on System On Chip Design and modelling by the University of Cambridge). Also see these slides by Princeton University : Lecture 15: Register Transfer Language and Verilog
At my university, I have been taught that RTL is a design abstraction which stands for Register Transfer Level and is used to denote a level for describing digital systems at the behavioral level as transfers between registers.
I have also heard about Register Transfer Language as an Intermediate Representation (IR) used by compilers such as GCC.
The RTL is an assembler language for an imaginary processor architecture. It is passed on to the backend, which converts it into the machine code for the target architecture.
From a technical point of view, is the use of the term Register Transfer Language for HDLs correct?