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I have an STM32G031K8 Nucleo development board and was thinking about interfacing it's GPIO with an old BCD-to-Seven-Segment Decoder integrated circuit (SN74LS47N). This is a 5V part... and while I know that the GPIO pins are "5V tolerant", I don't know whether it is safe for these parts to be connected under power up/power down sequences when the microcontroller may be off while the IC is powered.

The IC input pins has this input circuit that has an internal pullup to 5V with some additional Schottky diodes to protect the IC. If the IC is powered and the microcontroller is not, will the microcontroller be damaged? The STM32G031K8 datasheet says the GPIO pins can only withstand, at worst, a voltage of Vdd + 4.0... but then again there is very little current available to drive into the pin.

sn74ls47n

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  • \$\begingroup\$ As a note - my current alternative to connecting this IC to the GPIO pin directly would be to use an open-drain buffer in between the two. This is probably the "correct" way to interface between these two parts, if I had to guess. But I still don't really understand why a 5V tolerant GPIO pin wouldn't be 5V tolerant when powered off. \$\endgroup\$ – aosborne May 3 at 1:04
  • \$\begingroup\$ I would consider using this TTL with only 3.3V as the input only needs 2V tor Vih. The difference is a proportionally lower sink current on the open collector from the Vcc bias resistor. \$\endgroup\$ – Tony Stewart EE75 May 3 at 2:20
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If the datasheet says "Vcc + 0.4V" and Vcc=0V then +0.4V is your maximum safe voltage, until the rails come up. That is according to the datasheet. I would personally try to arrange things so that the situation where the 74xx IC is powered while the uC is not does not happen. As well as damage to the IO ports, weird things like latch up conditions and so on when you do not respect this type of constraint. Don't make your design risks worse thna they have to be. Eliminate unknowns.

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  • \$\begingroup\$ I can agree with that. But what's the point of a pin being labelled as "5V tolerant" when you still have to do all the extra work of making sure your board power sequences correctly? It's like a feature that supposed to make your designs simpler... but then it isn't. \$\endgroup\$ – aosborne May 4 at 4:48
  • \$\begingroup\$ I take your point. If you run at 3.3V but a pin is 5V tolerant then the Vcc + 0.4V is not strictly true for those pins. But only the datasheet can tell you if it is OK to apply 5V when 3V3 is not present. Noone here is going to know, unless they were involved with designing the silicon for that product family. \$\endgroup\$ – danmcb May 5 at 7:44

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