I am designing a simple common source JFET circuit as the front end to a guitar amplifier. It looks like this:
I arrived at the RD and RS values experimentally. I would prefer to determine them using a formula or graphical method, but I have had no luck finding anything.
I understand the drain resistor's role in determining gain. I understand how the source resistor works in self-biasing and its negative effect on gain. I understand how the voltage divider at the gate helps make the operating point more stable across manufacturing variations in JFETs. What I don't fully understand is the selection of the drain resistor and its relation to the source resistor. All of the references and instructional material I've found seem to start with "Given Rd is X and Rs is Y..." as if these values were passed down on stone tablets never to be questioned.
I am working with a Fairchild J112, with an IDSS of 5mA and a Vgs(off) of between -1V and -5V. I selected my source and drain resistors using a combination of conceptual analysis and experimentation.
This was my thought process:
- IDSS is the max current when gate voltage is zero. I plotted a load line with a Y-intercept of 5mA (IDSS) and an X-intercept of 12V (my supply voltage.)
- I chose an operating point in the middle (6 volts, 2.5mA)
- I used Ohm's law to determine a total resistance of 4.8k Ohms would give me 5mA at 12V. The internal "on resistance" of the J112 is low, listed at 50 Ohms, so I did not bother factoring it into the calculation.
- I experimented with various drain and source resistor combinations that added up to around 4.8k.
- For each combination, I measured the voltages across the drain and source resistors with a goal of the DC output (at the drain terminal) being in the center of the supply voltage while still maintaining the correct bias.
I settled on 3.3k and 2.2k (higher, but standard values) for the drain and source resistors, respectively. This gives me an output voltage of just under 6V (half my supply voltage.) I plan to bypass the source resistor to maximize gain.
My question is: Is there a better way to do this? Is there a graphical method or set of formulas that determines the values of drain and source resistors for a given design? Am I close to the mark with the method I used?