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Preface

I am designing a Solid State Relay as an educational exercise, to catch up on what my university did not teach me. I am a long time Linux user and open-source software lover, which brought me to ngspice for simulation. I don't have access to professional design software or simulators.

Context

I designed a Solid State Relay, had a PCB manufactured, and burned out the gate driver upon testing with a 24VDC supply. I was able to verify that the PCB matches my schematic. I took some measurements and found out that my bootstrap circuit (this is a high-side NMOS switch) doesn't appear to be working correctly. I failed to simulate it before having the PCB manufactured, but my back-of-napkin calculations seemed to say everything was in spec. Now, I am setting out to simulate an updated version of my schematic, which is where I am seeking advice.

The problem Bootstrap Capacitor Schematic Please pardon my amateur schematic. As I understand it, CBOOT1 charges through D1 from the supply, and when the voltage from VBOOT to the source node (in the middle of the two transistors here) rises high enough, Q1 will turn on, discharging the capacitor slowly through any current leaking through the gate. I have elided the gate driver, since I'm trying to just simulate this bootstrapping behavior in AC and DC, for now.

The issue is, ngspice cannot simulate this circuit. I have a level 0 model for the BSC220N from Infineon, and everything else is standard simulation-only components. ngspice seems to be having trouble inside the transistor model because of the source node between Q1 and Q2. Interestingly enough, I can simulate the model if I only use one transistor (which would work for DC-only applications), but the results are usually very noisy.

Does anyone have advice on how to get ngspice to converge? My SPICE code is below.

Circuit:

.title KiCad schematic
.include "/home/andy/workspace/coffee_items/bean_machine_controller/spice/libs/OptiMOS3_200V.lib"
VAC1 Net-_D1-Pad2_ GND dc 0 ac 120 sin(0 120 60)
RG1 Net-_Q1-Pad4_ /VBOOT 3
* CBOOT1 /VBOOT Net-_CBOOT1-Pad2_ 1u
CBOOT1 /VBOOT Net-_Q2-Pad8_ 1u
D1 /VBOOT Net-_D1-Pad2_ BASIC_DIODE
* RLOAD1 Net-_Q2-Pad8_ GND 8
RLOAD1 Net-_Q2-Pad8_ GND 8
XQ1 Net-_D1-Pad2_ Net-_Q1-Pad4_ Net-_Q2-Pad8_ BSC220N20NSFD_L0
* XQ2 Net-_Q2-Pad8_ Net-_Q1-Pad4_ Net-_CBOOT1-Pad2_ BSC220N20NSFD_L0
.end

Simulation script:

.title "boost circuit simulation"
.control
set ngbehavior=ps
dc vac1 0 120 1
tran 0.1s 10s 0s
option TEMP=27
.endc
.MODEL BASIC_DIODE D()
* .include "/home/andy/workspace/coffee_items/bean_machine_controller/spice/libs/OptiMOS3_200V.lib"
.include "boost_circuit.cir"

Invocation: ngspice boost_sim.cir

Output: doAnalyses: TRAN: Timestep too small; time = 0.0193025, timestep = 1.25e-13: trouble with node "e.xq1.eaux#branch"

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    \$\begingroup\$ Try this model: .model BSC320N20NS3 VDMOS(Rg=2.4 Vto=3.7 Rd=23.61m Rs=404u Rb=3.79m Kp=48.7 Lambda=0.015 Cgdmin=6p Cgdmax=0.27n A=0.5 Cgs=1.77n Cjo=2.66n M=0.45 Is=16.8p VJ=0.9 N=1.12 TT=120n ksubthres=.1). You may need to enable LTspice compatibility (this is from LTspice). BTW, if you meant to model your source as a 120 V RMS, then you should know that the value for the SIN() source is the peak value. As it is, your source has ~86 V RMS. This also means you may need to rethink the choice for your switches. \$\endgroup\$ – a concerned citizen May 6 at 16:54
  • \$\begingroup\$ Interesting, that worked! That model seems close enough to the one I'm using for this to be valid. I'm getting pretty much the behavior I expected, although after the transistors turn on, they stay on indefinitely. I was expecting the capacitor to discharge pretty quickly. Thanks for the tip on the SIN() source as well, I did not even think about that. \$\endgroup\$ – PyroAVR May 6 at 18:15
  • \$\begingroup\$ A couple other things to watch out for in KiCad/ngspice is to make sure you have the "Alternate Node Sequence" set properly for those MOSFET symbols you are using. A VDMOS .model statement assumes D-G-S (in that order). The same applies to the diode too. KiCad diode symbols have cathode first and anode second, and in SPICE it's opposite of that. I would also recommend using an actual diode model like a 1N4148 instead of using the default one. You can post here for more detailed help with KiCad/ngspice interface: forum.kicad.info/c/schematic/simulation-ngspice/20 \$\endgroup\$ – Ste Kulov May 7 at 5:33

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