I am designing a Solid State Relay as an educational exercise, to catch up on what my university did not teach me. I am a long time Linux user and open-source software lover, which brought me to
ngspice for simulation. I don't have access to professional design software or simulators.
I designed a Solid State Relay, had a PCB manufactured, and burned out the gate driver upon testing with a 24VDC supply. I was able to verify that the PCB matches my schematic. I took some measurements and found out that my bootstrap circuit (this is a high-side NMOS switch) doesn't appear to be working correctly. I failed to simulate it before having the PCB manufactured, but my back-of-napkin calculations seemed to say everything was in spec. Now, I am setting out to simulate an updated version of my schematic, which is where I am seeking advice.
Please pardon my amateur schematic. As I understand it,
CBOOT1 charges through
D1 from the supply, and when the voltage from
VBOOT to the source node (in the middle of the two transistors here) rises high enough, Q1 will turn on, discharging the capacitor slowly through any current leaking through the gate. I have elided the gate driver, since I'm trying to just simulate this bootstrapping behavior in AC and DC, for now.
The issue is,
ngspice cannot simulate this circuit. I have a level 0 model for the BSC220N from Infineon, and everything else is standard simulation-only components.
ngspice seems to be having trouble inside the transistor model because of the source node between Q1 and Q2.
Interestingly enough, I can simulate the model if I only use one transistor (which would work for DC-only applications), but the results are usually very noisy.
Does anyone have advice on how to get
ngspice to converge? My SPICE code is below.
.title KiCad schematic .include "/home/andy/workspace/coffee_items/bean_machine_controller/spice/libs/OptiMOS3_200V.lib" VAC1 Net-_D1-Pad2_ GND dc 0 ac 120 sin(0 120 60) RG1 Net-_Q1-Pad4_ /VBOOT 3 * CBOOT1 /VBOOT Net-_CBOOT1-Pad2_ 1u CBOOT1 /VBOOT Net-_Q2-Pad8_ 1u D1 /VBOOT Net-_D1-Pad2_ BASIC_DIODE * RLOAD1 Net-_Q2-Pad8_ GND 8 RLOAD1 Net-_Q2-Pad8_ GND 8 XQ1 Net-_D1-Pad2_ Net-_Q1-Pad4_ Net-_Q2-Pad8_ BSC220N20NSFD_L0 * XQ2 Net-_Q2-Pad8_ Net-_Q1-Pad4_ Net-_CBOOT1-Pad2_ BSC220N20NSFD_L0 .end
.title "boost circuit simulation" .control set ngbehavior=ps dc vac1 0 120 1 tran 0.1s 10s 0s option TEMP=27 .endc .MODEL BASIC_DIODE D() * .include "/home/andy/workspace/coffee_items/bean_machine_controller/spice/libs/OptiMOS3_200V.lib" .include "boost_circuit.cir"
doAnalyses: TRAN: Timestep too small; time = 0.0193025, timestep = 1.25e-13: trouble with node "e.xq1.eaux#branch"