# N-MOSFET driver for P-MOSFET high side switch

I need to create a high side switch to drive a 2.5W resistive load, which must be referenced to ground. I'm planning to use a P-MOSFET as load switch. The problem is there I have an inconstant voltage source from a battery (from 4.2V to 2.5V) and my logic works at 3.3 V. I use a step-up/step-down converter to stabilize voltage at my microcontroller. I therefore would like to use a N-MOSFET as a driver for the P-MOSFET to ensure that the P-MOSFET will always be closed and open whenever I need. I will drive the N MOSFET woth a PWM signal at 500 Hz. Will this topology work? simulate this circuit – Schematic created using CircuitLab

• Yes probably it will work, if transistors have low threshold voltage Vth, but the resistor R6 is too high, IMO. May 6, 2021 at 17:17
• Do you need to PWM? If yes, then what frequency, if not then you can try as is, but it could have long turn-off time due to high R6. May 6, 2021 at 17:43
• Instead of building from discrete semiconductors, most manufacturers create integrated circuit load switches which are tuned for this specific application. Here's one example, and here is the category for searching on Digi-Key: digikey.com/en/products/filter/… May 7, 2021 at 13:56

thanks for the circuit diagram. I simulated your circuit on LTspice and found that your circuit will not work correctly, as pointed out by @zozwold the value of R2 = 100k (R6 in your diagram) is very high. The gate of the MOSFET doesn't completely charge because of it.  As you can see in the output waveform, the green waveform is the PWM signal and the blue waveform is the PMOS Gate signal. In this image, you can see the output waveform is better. I changed the value of R2 from 100k to 1k that's all. With this change, your circuit should work.

• +1 Nice. With 1k ohm there is 5 : 1k = 0.5% of energy waste when on, which is acceptable.It would be nice to see also the power dissipation of main MOSFET its gate current and power dissipation of driving MOSFET. May 7, 2021 at 9:18

I saw a similar circuit from Arduino forum link: simulate this circuit – Schematic created using CircuitLab

The D1 prevents the cross conduction, R2 is the gate resistor. At low voltages of your need, this won't work perfect. Perhaps you could change BJT with MOSFET.

Allernatively you could use a inverting CMOS buffer, like SN74LVC1G14-Q1, 74LVC1G04 ,...  simulate this circuit

Simulation SPICE (transistor not equal, because it is not in the default list) Vcc=2.5V. You can see the current of Q2 is just a spike of cca. 30mA, this is the MOSFET gate discharge current. Voltage on load is full Vcc. Vcc=4.2V. Green - Q2 current spikes at 45mA; Blue - Q1 current spikes at 25mA/ gate charging current; Red - load voltage. The mentioned circuit is very fast, no need for pull-ups and pull-downs, if the MCU starts with the GPIO at HiZ it won't conduct.

• Could you please explain what do you mean by cross conduction? Where and how would that happen? May 6, 2021 at 19:08
• If you have totem pole (push pull) then each transistor has to be in opposite conduction mode with respect to the other. If both transistors conduct at the same time, you have a cross conduction, this may happen at transition. Push-pull is more efficient, since it doesn't draw current, but it has this issue if you place P type as highside and N type as lowside, the gate drivers have N on top and P on bottom, while low voltage GPIO has P on top and N on bottom. IMO, it takes care on wafer production to match the needs, so maybe using a CMOS buffer IC you are on safe side. May 6, 2021 at 19:53
• I see that, in a push-pull you would obviously need to prevent mosfet from colliding. But does it apply to my circuit too? May 6, 2021 at 19:56
• @Francesco No. Your's isn't a push-pull, but you have to substantially reduce the R6, so a current will flow at ON state. It could be that your circuit is just fine, but I suggest you to simulate it with SPICE, it may have quite large turn-off time, thus heating the MOSFET. May 6, 2021 at 20:06
• It looks like you made a mistake copying the schematic. In the page linked, Q1 is an NPN follower. And to clarify about reducing cross conduction, now that D1 is there, Q1's base gets pulled lower than its emitter when pulled down by Q2. But it's higher than its emitter when Q2 is off and Q1 is pulled up by R2. That means when current wasted through Q1 is less when Q2 is on than current it can supply when Q2 is off. May 7, 2021 at 4:16

That will work I think, but if you're doing fast PWM switching you should reduce the value of R6. All of the other parameters seem fine.

That p-mosfet has an input capacitance of 6820pF according to the datasheet, so the 100k resistance may cause problems with charging the gate if your switching frequency is too fast.

R5 is probably fine, but same thing with switching frequency. You may want to reduce it to something like a 10k resistor if it needs to discharge the gate quickly.

I recommend using such a gate-driver circuit for PWMing something with a P-FET Here are the simulation results  It is quite simple to build and understand.

Here is the spice level netlist

Q1 0 N001 N002 0 2N3906
Q2 COM N001 N002 0 2N3904
R1 COM N001 2.2k
R2 N001 N003 100R
R3 Vgate N002 2.2R
Q3 N003 N004 0 0 2N3904
M1 Vload Vgate COM COM FDC5614P