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I've been trying to condense the pure NOR-gate based Apollo Guidance Computer schematics into a more higher level view of the logic elements and came across this interesting piece:

schematic

simulate this circuit – Schematic created using CircuitLab

From this page in the AGC archives.

At first glance, it just looks like a flip flop based on the crossing feedback, but the top NOR gate has 3 inputs, not 2, so it's not a standard flip flop built from 2 input NOR gates.

So then, what exactly is it doing? I'm guessing it's still a flip flop of some sort since it's clearly storing a bit, but what is the extra input on the top NOR-gate for?

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    \$\begingroup\$ Most of us would say that it is not a flip-flop, it is a latch. \$\endgroup\$ – Elliot Alderson May 6 at 19:48
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    \$\begingroup\$ @ElliotAlderson I found myself wanting to refer to it as a latch too, but I found too many internet resources referring to it as a flipflop, including the following: " This distinction is relatively recent and is not formal, with many authorities still referring to flip-flops as latches and vice versa, but it is a helpful distinction to make for the sake of clarity." \$\endgroup\$ – stix May 6 at 19:54
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    \$\begingroup\$ There's a more complicated latch in the AGC that has a flaw... have fun: electronics.stackexchange.com/questions/452206/… \$\endgroup\$ – hacktastical May 6 at 19:57
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    \$\begingroup\$ In case wider context helps, F10B is one of the phases of the 100Hz clock, and TC0 and TCF0 seem to be signals indicating that the current instruction is a TC or TCF (jumps to either erasable or fixed addresses). This appears to be part of the "TC trap", or in modern parlance, a watchdog that makes sure that the CPU is executing a jump at least every few milliseconds. It doesn't matter which of TC0 or TCF0 we get, either one is fine. \$\endgroup\$ – hobbs May 6 at 20:04
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    \$\begingroup\$ @ElliotAlderson In the 1960's pretty much any such arrangement of cross-coupled switching elements was know as a flip-flop. The modern distinctions hadn't entered the language. \$\endgroup\$ – John Doty May 7 at 13:51
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It is an alternate signal for setting the state with the output high.

It could be for example connected to a global signal to set a group of registers to a known value.

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    \$\begingroup\$ So in other words it's equivalent to an OR gate sitting in front of the S input on a standard S/R flipflop? \$\endgroup\$ – stix May 6 at 19:34
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    \$\begingroup\$ @stix Yes. You can think of the 3 input NOR as a 2 input NOR with one of the inputs connected to a 2 input OR \$\endgroup\$ – devnull May 6 at 19:45
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    \$\begingroup\$ It's a norverride. \$\endgroup\$ – J... May 7 at 13:29
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You can add/remove as many additional inputs as you want to both NOR gates. All you have to do is leave at least one input on the gate to close the positive feedback.

An example of such a "1-input NOR gate" can be the simple transistor inverter. I used it to build a transistor RS latch in front of my students many years ago. In 2008, this scenario was implemented in the lab and described by my students in a Wikibooks story.

The figures below show the evolution of this idea or more precisely, the way of drawing. As you can see, the last three figures are equivalent.

Noninverting amplifier

Fig. 1. A noninverting amplifier

Latch by a noninverting amplifier

Fig. 2. Latch made by a noninverting amplifier

Latch by two inverters

Fig. 3. Latch made by two inverters in loop

Latch by cross-coupled inverters in loop

Fig. 4. Latch drawn as two cross-coupled inverters in loop

SRAM cell.jpg

Fig. 5. Latch symmetrically drawn as two inverters in loop (SRAM cell)

Note that all these structures are made by 1-input elements. They are "brutally" driven by applying the input signals to the same inputs where the positive feedback is applied. So there is a conflict between two voltage sources - the circuit outputs and the input sources. The solution is to control the cells by more powerful input sources (as in SRAM)... or to add additional inputs for the input sources (as in flip-flops) to control the cells in a conflict-free way.

RS latch

Fig. 6. RS latch implemented by 2-input NANDs (Wikipedia)

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    \$\begingroup\$ Indeed. And not limited to 1960's NOR-only logic. I put almost exactly that circuit into an x-ray spectrometer design a couple of months ago. CMOS NAND rather than RTL NOR, but otherwise identical. \$\endgroup\$ – John Doty May 7 at 13:57
  • \$\begingroup\$ @JohnDoty what did you find about the diffraction pattern of the circuit? \$\endgroup\$ – user253751 May 7 at 15:13
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    \$\begingroup\$ @user253751 It's a nondispersive spectrometer ツ \$\endgroup\$ – John Doty May 7 at 15:16
  • \$\begingroup\$ @JohnDoty oh, wrong instrument. What did you find about the X-ray spectrum of the circuit? \$\endgroup\$ – user253751 May 7 at 16:03
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    \$\begingroup\$ @JohnDoty darn, I skipped the word "design", otherwise I thought it was a good joke \$\endgroup\$ – user253751 May 7 at 16:42

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