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I'm using TI TPS54719 DC-DC and I'm trying to understand the PWRGD signal functionality.

Definition of PWRGD pin in datasheet: An open drain output, asserts low if output voltage is low due to thermal shutdown, overcurrent, over/undervoltage or EN shut down.

This is an illustration from datasheet that demonstrates sequencing of two TPS54719 devices:

enter image description here

Also, according to the datasheet:

The PWRGD pin output is an open drain MOSFET. The output is pulled low when the VSENSE voltage enters the fault condition by falling below 91% or rising above 110% of the nominal internal reference voltage. There is a 2% hysteresis on the threshold voltage, so when the VSENSE voltage rises to the good condition above 93% or falls below 108% of the internal voltage reference the PWRGD output MOSFET is turned off. It is recommended to use a pull-up resistor between the values of 1kΩ and 100kΩ to a voltage source that is 6 V or less. The PWRGD is in a valid state once the VIN input voltage is greater than 0.8 V, typically.

I didn't understand why we need the Pull-Up resistor for the PWRGD signal, and why for example in the picture above they didn't use this Pull-Up resistor. when I tried to do a simulation in https://webench.ti.com/power-designer, the PWRGD signal was automatically connected to VIN through 86K Pull-Up resistor. how in this case I should use this signal for sequencing?

what I expect from PWRGD is to go from LOW (0V) to HIGH (some value above EN threshold) when VOUT is above 91% of it's final value. so first, I'm confused with the fact that PWRGD signal changes according to VSENSE and not VOUT. and second, according to the explanation above, I understand that if we want to sequence two devices (like in the image below) the signal between PWRGD1 and EN2 should be connected to VDD through a pull up resistor. why it's not connected?

here is an image of the internal circuitry:

enter image description here

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    \$\begingroup\$ It’s 93% to turn on and 91% to turn off. Open drain like open collector must have a pullup from some current source in the power supply itself or the cascaded enable from next supply voltage \$\endgroup\$ Commented May 7, 2021 at 20:13

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As the powergood output is an open drain, it can only pull low, or do nothing, so that is why it needs another device like a resistor to pull up.

Because the enable input already has an internal pull-up current source, no external resistor is needed.

And because VOUT is settable by user with external output voltage setting resistors, it is the voltage-divided feedback sent to VSENSE pin which is compared to internal tresholds. This way it works regardless of how the user has selected the VOUT, because Vout basically sets the VSENSE pin voltage via the feedback resistors.

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