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I am investigating PCB stack-up. Everywhere I have seen it says to route signals on adjacent layers orthogonally to reduce the coupling. I have two questions:

  1. How does orthogonal routing reduces the coupling?

  2. Is the coupling mechanism inductive or capacitive?

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    \$\begingroup\$ What are the currents and signal frequencies that you are working with? \$\endgroup\$ – Andrew Morton May 9 at 18:11
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    \$\begingroup\$ The coupling mechanism is usually capacitive, but both mechanisms are made worse when signals on adjacent layers are parallel. \$\endgroup\$ – mkeith May 9 at 18:18
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Parallel lines of high impedance can couple dV/dt and dI/dt according to the gap and loop impedances. So it can be L or C or both. Saturn PCB design exe helps compute crosstalk and impedances in nH/mm and pF/mm for RF which includes fast risetimes in logic.

More important for low EMI boards is orthogonal layouts permit easier connections with fewer vias.

This is also why decoupling caps are placed near Vdd Vss to reduce the loop area of current spikes drawn by CMOS switched pF logic.

Thus traces can be considered single turn transformers very loosely coupled or capacitively coupled. Also interleaved thin ground tracks or layers shunt this crosstalk considerably when required. In analog high impedance circuits, the active common-mode signal can "guard " tracks where the signal comes from to reduce the differential voltage and thus capacitance between the wires and reduce the coupling to outside wires.

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  • \$\begingroup\$ Thank you.But How the orthogonal routing reduces these coupling. \$\endgroup\$ – HARI T O May 9 at 17:10
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    \$\begingroup\$ Do you not understand the center field in a current loop? or field between capacitor plates ? the more that crosses the same path and the closer it is, the stronger the coupling and how impedance depends on the risetime. So there is no need to worry about coupling DC \$\endgroup\$ – Tony Stewart EE75 May 9 at 17:16
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    \$\begingroup\$ @HARITO From the magnetic force on a current, \$F = BIL\$, where \$L\$ is length: less length = less force (the force acts on the electrons in the material). From the formula for capacitance, \$C = \varepsilon_0 {A / d}\$, a smaller common area or larger distance will result in a smaller capacitance. So you can see that orthogonal conductors will minimise the length, common area, and distance. \$\endgroup\$ – Andrew Morton May 9 at 17:22
  • \$\begingroup\$ @TonyStewartEE75 Is my suggestion to look at \$F = BIL\$ wrong, or just at the wrong level? \$\endgroup\$ – Andrew Morton May 9 at 17:34
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    \$\begingroup\$ @AndrewMorton. It is a weak transformer loop mutual coupling of current. ...with source and load impedance and spectral impedance ratio that determines what part of the spectrum is coupled and how much. Thus primary and secondary inductance which depends on length and area of the loop and Z(f) = 2pi f L with ~ 8 nH/cm for an individual wire. opposing currents cancel the coupling if planar or far field where the distance >> the return loop gap. Since V=LdI/dt the voltage coupled is proportional to slew rate. one uses diff.signals and twisted pair or coax when needed. and orthogonal traces. \$\endgroup\$ – Tony Stewart EE75 May 9 at 18:01

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