# Why do buck converters end up in steady state?

I'm studying buck converters such as the one in the following simulation:

I have learned that for buck converters that are in continuous conduction mode and at steady state, the following equation holds, and I find its derivation convincing:

$$\D_{\text{uty cycle}}=\frac{V_{out (avgerage)}}{V_{in}}\$$

However, it's never explained why the buck converter has to end in a steady state.

I have simulated the circuit and played around with components and their values and the circuit always seems to end up in steady state eventually.

• How can I tell if the buck converter will or will not operate in steady state?
• What are the conditions required to assume the circuit will reach and stay at a steady state eventually?
• Can I actually design a buck converter that will not reach steady state?

For clarity, this is for a buck converter with no feedback control that operates at some fixed frecuency and duty cycle.

EDIT: The original question proposed "Why doesn't the current in the inductor gradually increase in each cycle until it reaches infinity? (assuming ideal components)". This has been adressed in the answers. I'm removing it because it was not the main question but it seems to have particularly captured the atention of most since it was the most obviously wrong statement. Thanks for the clarification.

• If it doesn't enter steady state, it's unstable. Things without feedback can't be unstable. A real buck converter with feedback does have modes of instability that have to be dealt with. May 20, 2021 at 7:20
• "Why doesn't the current in the inductor gradually increase in each cycle until it reaches infinity?" This is a bit like asking how come an oven that is on doesn't keep getting hotter and hotter. The hotter it gets the higher the temperature gradient and the faster heat flows out of the oven. The higher your buck converter current gets the higher the output voltage gets which pushes more current through the load discharging the cap more. May 20, 2021 at 7:23
• Well, if I hook up a voltage source and an inductor the current will increase indefinitely. But you are right, I will change the question and say "why doesnt the inductor let the maximum current (source voltage over load)" May 20, 2021 at 7:29
• No it won't. You seem to be talking as if you only have a voltage source and inductor. But you don't. You have a load in there too. May 20, 2021 at 7:30

It looks like your questions are not restricted to an open-loop buck.

How can I tell if the buck converter will or will not operate in steady state?

First start with the definition of the steady-state: the state of the system when the changes in its output drop below a certain value (usually 1%). This is relative to the required output. For example, a 5 V converter, the output is considered to reach the steady state when the value has reached [4.95...5.05] V and it doesn't grow, anymore. It's said that it decayed asymptotically towards the final goal. Note: the system is considered for a stable input/output, i.e. there are no changes in the source, the load, the switching frequency, etc.

Therefore if a buck converter operates in the steady-state then its output is not wobbling, oscillating, varying -- it's steady. For a switching converter, ripple is part of the business, so that is not considered an oscillation (but it is required to be within the specs).

What are the conditions required to assume the circuit will reach and stay at a steady state eventually?

Reaching a steady-state is not an instantaneous operation, it takes time. How much depends on the system, the feedback, the level of perturbation, etc. So the conditions are just like above: the system is set to reach a state, then it's not touched or altered in any way, and the output is observed until it reaches the final value within certain limits (or not).

When I say "set to reach a state" I mean, for example, the supply is turned on (step input), or a load is connected/disconnected (step output), or the error voltage is perturbed, etc. After all these, the system is left to reach the steady-state and the time is measured.

Can I actually design a buck converter that will not reach steady state?

Of course. All you have to do is disregard all the good advices about control. But you won't be able to do it in open loop, because then the equivalent circuit is the output LC filter with a load, which means it's a passive circuit and those are inherently stable. Even ideal components can only be critically stable, the poles can never end up in the RHP.

A feedback is another matter, it's an active participation to the system. That's where poles can be added or modified (bad loop filters), zeros can come out of seemingly nowhere and make your output wobble (duty cycle instabilities).

For example, here is a basic voltage-mode buck with the loop filter having the zero above the corner frequency of the output LC filter, and inside:

The values are chosen "by ear", enough to show that with a switching frequency if 100 kHz and fc ~ 1.5 kHz, the zeros are at 159 kHz (black trace), 15.9 kHz (blue), 1.59 kHz (red), and ~159 Hz (green). The ones beyond fc can't settle because they can't compensate the LC filter (black, blue), the one around fc is marginally stable, but not enough (red), and the green one compensates enough phase to avoid oscillations, but not enough to provide a good 5 V output. As I said, it's for exemplification, only, otherwise the gain, too, would ned adjustment, not just the zero.

• Very interesting! I was not aware that passive circuits where always stable nor that a switch switching at a certain frecuency could be considered a passive component. I guess the question boils down to "why are passive circuits inherently stable" then. I have some googling to do. May 20, 2021 at 20:10
• @JoaquinBrandan Well, that's a bit of an over-simplification, but what I tried to say was that the whole equivalent circuit becomes passive, since the switch can have an averaged model. The switch is hardly a passive device, itself. As for why the passive circuits are always stable, that's easy: there is always a resistor in there, which signifies losses, damping. The ideal case means no resistors, which means the poles are right on the jw axis, therefore critically stable. You can't have negative resistors without active elements. May 20, 2021 at 20:15
• I am not knowlegable in control theory (yet), I think I need to know a bit of control theory to understand what you are saying in that comment. Am I correct? May 20, 2021 at 20:24
• @JoaquinBrandan I suppose so, but you can think of it in terms of the average waveform, not the switched one. The definite integral over one cycle will give you that value, and the formula is what you have in the OP. May 20, 2021 at 20:29

Why doesn't the current in the inductor gradually increase in each cycle until it reaches infinity?

Because your circuit has a load that is not a short circuit.

$$\ di/dt = e/L \$$

When the FET is ON, voltage across the inductor is Vin-Vout, so its current increases according to $$\ di/dt = (V_{in}-V_{out})/L \$$.

When the FET is OFF, voltage across the inductor is -Vout, so its current decreases according to $$\ di/dt = (V_F-V_{out})/L \$$, with VF from the diode.

In both cases, I neglected resistance in the circuit, but you'd have to account for it if you want more accurate results.

If there is a load that isn't a short circuit on the output, like your resistor, then output voltage will rise. As Vout rises, during on-time, inductor current increases less (because that part is proportional to Vin-Vout), and during off-time it decreases more (because that part is proportional to Vf-Vout).

At some value of Vout, the increase in current during ON-time is equal and opposite to the decrease in current during OFF-time, so the inductor current is a sawtooth: that's steady state.

If there is an output cap and no PWM soft-start there will be some LC ringing and inductor current can get quite large as the output cap charges:

Since you use a non-synchronous buck if the inductor current never drops below zero it will be in continuous conduction mode, but if it drops below zero the diode will turn off at this point, so it will be in discontinuous mode:

If the output is shorted, Vout remains 0V, so inductor current will increase each cycle, but during the OFF-time portion of the cycle, it won't decrease much, since there is only the diode Vf across it. So it will keep rising until the FET or the diode overheat. I've run the simulation with a 500mA diode, so it would smoke rather fast at 50 Amps:

If there is no load on the output, just a cap, then output voltage will rise to be almost equal to the input voltage, and when the FET turns on, inductor current will not increase since (Vin-Vout)=0. In this sim, even though the PWM is 50%, Vout goes very close to Vin, because once it's there, there is no way for the cap to discharge without a load:

• Could you elaborate on why does it reach steady state? why (eventually) must the current always go up and down the same amount each cycle forming a sawtooth? This seems to be assumed in most calculations in order to derive the buck converter equations. May 20, 2021 at 7:48
• I've worded it a bit clearer. Basically the output voltage will "set itself" so you get a steady state sawtooth. May 20, 2021 at 8:14

I cannot give you a rigorous answer, but perhaps some intuitive understanding that can be at least of some help.

The output voltage of the circuit, and the output current, in the model you are using are independent.

The output voltage depends only on the duty cycle, the reason for that is that you basically are low pass filtering a square wave, with the LC filter, thus getting its rms value on the output.

The output current is then set by the load - in your case you have a resistive load, so you can compute the output current using Ohm's law. The average coil current will be equal to the output current, and the ripple current in the coil is determined by input & output voltage, and the coil value itself.

Why can't current go to infinity? Well, why do you think it should go? To have the current go up and up, in your model, you need the voltage to go up and up, but due to the topology of your ckt the output voltage cannot be higher than the input voltage, so the current is also limited.

Try to run your circuit without a load, or with a slightly negative load (use a current source).

Steady state is when the inductor volt-seconds during the on-time is equal to the volt-seconds during the off-time. In other words, the volt-second integral over a cycle is equal to zero. Otherwise, the flux in the core is unbalanced, which means either the input or output voltages are changing. This happens during input and output voltage transients, fast changes in either. By the way, this is for fixed frequency PWM and no feedback loop. Just set the duty cycle to a fixed value.