# EMC Design Precaution

I'm designing a simple circuit which will charge a big capacitor for 3 seconds, then pass a 5A current for few microseconds, then charge again the big capacitor for 3 seconds, then pump again 5A for a few microseconds, and so on. And now I test it on a breadboard and I'm convince that its working. So I started to do a PCB layout.

Questions are the following:

1. Do I need to concerned on the EMI emission?
2. What design techniques can you recommend to me or PCB guide layout on this specific PCB.
3. Any precaution that I need to do in the circuit or even PCB layout?
• Sharing your schematic will help formulate good answers. Also, is the circuit going to pass 5 Amperes "for few Microseconds" or "for 3S"? Contradictory information in the question. – Anindo Ghosh Jan 31 '13 at 5:35
• Is 3s the repetition period of pulses? – Nick Alexeev Jan 31 '13 at 6:00
• It will pump 5A for few microseconds and this scenario will be repeated after 3S. – jasp Jan 31 '13 at 8:38
• It will better if you can explain more about the schematic. Could include a capture of the schematic? – Jesus Castane Jan 31 '13 at 10:58
• What is the different between 2nd and 3rd question? – Jesus Castane Jan 31 '13 at 10:59

## 2 Answers

1.- Yes, sure. You always must attend the EMC performance of your electronics design.

EMC or Signal Integrity, we are talking about the same. Although probably It's a hobbyist-project and you won't need to pass an emission or immunity EMC test in a EMC Lab but EMC is also the noise, the crosstalk or ground bounce and this could be a problem inside your project.

So, yes. For emission you can check: (only a summary)

• Raise/Fall Time in high speed signals.
• Layout of high speed. (Changes of layers, loop current...)
• Possible antennas. (Your connector and your cables could work as an antennas)

2.- It would better if you explain us more about your circuit.

I suppose there is a component that works as a switch. The out of this component we can call it "switch node". In this node the voltage is

$$V = L (di/dt)$$

; V is voltage, L the inductance of the node, i is the current, and $$di/dt$$ is the rise time (or fall time) of change.

This parameter is really important!

Maybe you can:

• Decrease the rise time. (Could it work slower?)
• Decrease the voltage (Could you use a lower voltage?)
• Decrease the inductance in your switch node.
• Include a snubber (a circuit for absorb the voltage peak).

3.- This question is the similar to 2 isn't it?

Some additional tips for PCB design in EMC point of view:

• Try to keep conductor loops as small as possible (usually can be followed when using optimized and short conducting routes). See: Electromagnetic induction.

• Try to avoid 90 degree "corner" turns in PCB conductors as the signal may "bounce" in tight turns -> can cause EM-interference. Good way is to use 45 degree turns.

• Do not use too narrow conductors especially in power line conductors (VCC etc.)
• Try to have good ground (GND) plane and grounded in multiple points -> reduces EM-interference
• Use EM-radiation against itself: keep forwarding and returning current conductors next each other -> cancel out each others' EM-fields.
• Good points, except 90 degree corners aren't usually that bad. It's probably not worth the effort to round off/chamfer most corners. – Justin Jun 18 '13 at 11:52
• To add to wha @Justin says, my experience is 90 degree bends are no problem up to 1 GHz or so. Also, isn't your 5th bullet item the same as your first bullet? – The Photon Jun 18 '13 at 15:35
• No they are not. In the first bullet the point is to keep area inside a conductor loop small -> induces smaller voltages from outer EM-fields. In the 5th bullet point is that in a conductor flows current that creates EM-field. In returning conductor approximately same amount of current flows and their EM-field sum together -> zeroing each other's EM-field. – sailfish Jun 19 '13 at 15:00