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I have this circuit (shown below), I need to calculate the total error voltage at the output of the Op-Amp due to R3 and Vos.

CCT

U1 is the LM741, which has Vos = 5mV and ib = 80nA.

Till now I’ve calculated the error voltage contribution for Vos as following;

Vo = Vos * (1 + Rf/R1)

Vo = 5m * (1 + 47k/2k)

Vo = 122.5mV

How can I calculate the error voltage contribution for R3?

Thanks !

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  • \$\begingroup\$ What is the impedance of Vi ? The error contribution of R3 depends on this \$\endgroup\$
    – tobalt
    May 25, 2021 at 10:00
  • \$\begingroup\$ @tobalt, I can assume that Vi is a high impedance source \$\endgroup\$
    – onlooker
    May 25, 2021 at 10:14
  • \$\begingroup\$ so if Vi has a source impedance that is much larger than R3, then all of the input bias current of the + input flows where ? (However, in this case, the signal being fed via Vi would be also shunted to GND and the circuit makes no sense) \$\endgroup\$
    – tobalt
    May 25, 2021 at 10:17
  • \$\begingroup\$ @tobalt, Thanks. What if Vi has a low impedance? \$\endgroup\$
    – onlooker
    May 25, 2021 at 10:23
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    \$\begingroup\$ The same rationale. Consider where the input bias current would flow and what the associated voltage drop will be that is visible at IN+ \$\endgroup\$
    – tobalt
    May 25, 2021 at 10:26

1 Answer 1

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When attempting to calculate total output offset you must consider the effects of Vio and Ibias separately as you are trying to do. To calculate the output offset due to Ibias let's assume that Vio (input offset) is zero and that the input bias currents are equal to each other (Ios = 0). Let's also name the input signal source resistance as Rs.

If Rs is equal to zero Ohms (ideal voltage source) then the offset at the output due to bias currents is equal to Ibias*R1. (the bias current from the non-inverting input flows straight to ground).

If we were to now slowly increase Rs then the output offset would linearly reduce with increasing Rs until the output offset due to bias currents equals zero volts when (Rs//R3)=(R1//R2).

Note that Vio can be positive or negative causing either a positive or negative output offset. Similarly the output offset due to bias currents can be either positive or negative, depending on whether the op amp's input transistors are npn or pnp. This means that the output offset due to Vio and the output offset due to Ibias can add together or partially cancel each other out.

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    \$\begingroup\$ Thanks for your answer \$\endgroup\$
    – onlooker
    May 25, 2021 at 12:37

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