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I have a pulse charging circuit where the maximum current is limited by the hFE of the PNP transistor (DTA144EE). The typical hFE at room temperature is ~220 as shown in the plot below. There is of course no spec on the max Hfe at room or any other temperature.

My calculations show that the circuit will correctly limit the current to 100 mA due to the current gain as long as the gain is not more than 500.

Is > 500 a physically realizable gain value at 100 mA for a low power discrete PNP transistor, or am I safe to assume that the gain will never be more than 500? Note that I am operating in fast pulse mode, so 100 mA is in the safe operating area for the ~100 ms charge time for the circuit.

Note that PNPs with 500 gain exist, but I could not find one near that at 100 mA of collector current. The high gain was in the 1 mA range.

Also, doesn't gain typically go down at higher currents?

enter image description here

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    \$\begingroup\$ PNP's suffer a carrier mobility problem. I know that some folks, two decades ago or so, were working on ideas that would enhance hFE while at the same time improve their high frequency performance. These were based on some ideas then called SALTran. But I think these were low current devices, too. I don't know what your circuit issues are and this may be a very dumb question because I'm pretty sure you already have considered it and set it aside. But what does a Darlington or Sziklai configuration fail to do for you? (Just want to dot that i, cross that t, so to speak.) \$\endgroup\$
    – jonk
    May 28, 2021 at 5:24
  • \$\begingroup\$ where the maximum current is limited by the hFE of the PNP Show us that circuit. In my experience, designing circuits that rely on the \$h_{FE}\$ of a BJT is simply asking for trouble unless you know and realize that \$h_{FE}\$ varies "all over the place" and that that's OK. Also, doesn't gain typically go down at higher currents? Yes it does. And it varies over temperature. I would not be surprised if the phase of the moon also has some influence ;-) Now you know why I never rely on the \$h_{FE}\$ of a BJT. \$\endgroup\$
    – Bimpelrekkie
    May 28, 2021 at 6:59
  • \$\begingroup\$ I suspect that a selected BC327-400 may come close. I'd need to check. Usually having a PNP with beta under 500 at 100 mA would be expected. \$\endgroup\$
    – Russell McMahon ♦
    May 28, 2021 at 9:23
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    \$\begingroup\$ BC327-40 beta 250-600 at 100 mA. digchip.com/datasheets/parts/datasheet/456/BC327-40.php \$\endgroup\$
    – Russell McMahon ♦
    May 28, 2021 at 9:28

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I have a pulse charging circuit where the maximum current is limited by the hFE of the PNP transistor (DTA144EE). The typical hFE at room temperature is ~220 as shown in the plot below. There is of course no spec on the max Hfe at room or any other temperature.

The manufacturer might separate out transistors with gain higher than some value, or they might not. If there is no specification you can't guarantee it won't be higher than 500.

If your application requires that current be limited below a particular value then you should design that value into the circuit, not rely on non-specified behavior.

Is > 500 a physically realizable gain value at 100 mA for a low power discrete PNP transistor

Yes. For example, the ZXTP25040DFL has a maximum HFE of 900 at 10 mA, typically dropping less than 10% at 100 mA. At 100 °C the typical HFE is 600 at 100 mA.

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