I am trying to understand interrupts in embedded systems. Please correct me where I am wrong. Below is my understanding.
This could help me and other who are trying to understand interrupts.
Interrupts are the signals generated by a peripheral to request the microprocessor to perform a task. When an interrupt occurs, the CPU executes the current running instruction then stores the necessary stack pointer and program counter (PC) information somewhere in RAM allocated for the current function.
The PC is now vectored to the corresponding interrupt vector table index to execute ISR routine.
All interrupts are assigned individual enable bits which must be written logic one together with the global interrupt enable bit in the status register in order to enable the interrupt.
When an interrupt occurs, its interrupt flag is set and the corresponding ISR routine reads this flag inside them. For some peripherals these can be automatically cleared by reading the interrupt flag bit and data register while for some peripherals we need to explicitly write a logic one to clear the interrupt flag bit.
If the corresponding interrupt flag bit is not cleared it cannot interrupt corresponding events again (for example, when interrupt A occurred and its interrupt flag is set until and unless you clear the interrupt flag the processor will not be notified about the next event from A,) make sure to read the necessary register before clearing them. Am I correct?
When an interrupt occurs, inside its ISR routine we can disable interrupt either by setting individual interrupt enable bit to zero or by setting global interrupt bit to zero. Doing this is not advised because this hinders nested interrupts from occurring thus some information will be lost.
When nested interrupts are enabled, a low priority can be preempted by a high priority interrupt.The ISR routine of the low priority interrupt will saved and high priority will get executed. If both are of same priority the interrupt with lowest sub-priority will be executed. Who assigns this sub-priority?
Maskable interrupts are the ones where we can disable the interrupt by writing instruction like setting the "Interrupt Enable" bit to zero.
Vectored interrupts are the ones where we already know the address to jump for the ISR, like the interrupt vector table with address and priority, for example the SPI, I2C, UART interrupt, timer.
What are non-vectored interrupts? I know that that we do not have a predefined address, but what is that suppose to mean? Can someone please give an example?