I have a question regarding on linear voltage regulator. The pass element in the linear voltage regulator can be NPN or PNP transistor. If a Darlington pair is used as the pass element, the dropout voltage will be Vsat+2Vbe. Is that because the PNP is in saturation mode and the NPN is in active region? I'm having a hard time to analysis the transistor. Why not the dropout voltage just Vsat of the NPN?
If a Darlington pair is used as the pass element, the dropout voltage will be Vsat+2Vbe. Why not the dropout voltage just Vsat of the NPN?
Lets say that you have a 5V linear regulator with an NPN Darlington pair series pass transistor. In order to get 5V at the output, the transistor must be driven properly. By properly, I mean the Darlington pair must be supplied with an appropriate base current in order to bias it to supply 5V at the output.
Now look at the arrows in the datlington pair's symbol. It tells you the direction of current flow through the transistor. The base current flows from the base to the emitter. So if a base current must be supplied to the darlington pair, a voltage must appear at the base of it that pushes some current from the base to the emitter; a base voltage that is 2*0.7V greater than the emitter voltage will push current through the base emitter junction of the transistor, thus biasing it.
So if the output voltage is at 5V (which is obtained from the emitter of the transistor), the base drive voltage should be able to go up to at least 5V + 2*Vbe to drive the transistor.
Now that we have got our 5V, we are obviously going to connect a load to it, right? When the load draws current, the current has to flow through the collector to emitter path of one (the outer, let's say) transistor. This voltage drop adds to the overall dropout voltage of the voltage regulator. That is how the dropout voltage turns out to be 2Vbe + Vce(sat).
Lets look at an example. Lets say that a darlington pair has a Vbe of 1.5V and a Vce(sat) of 0.5V at 1A of load current. Then, you will need to supply atleast (5 + 1.5 + 0.5)v, or atleast 7V.
Why not the dropout voltage just Vsat of the NPN?
As Transistor said, saturation requires driving the base at a higher voltage than the collector, which means higher than the input voltage, which is not possible unless another higher supply is available.
It would not be desirable anyway, as a BJT close to saturation has quite awful characteristics, it becomes very slow and its capacitance increases, which means the regulator's transient performance would become poor. If the transistor is fully saturated, then the regulator is no longer regulating anything.
It is possible to do it with a NMOS if a higher supply is available, which can be done with a charge pump. Some LDOs exploit this. In this case, when dropout voltage is low the MOS works in "variable resistor" mode which is also slower than normal follower mode, but still usable.
Figure 1. A Darlington pair driving a 1 kΩ load.
- Q1 can't be driven into saturation which would require the collector voltage to drop below the base voltage. It can't because the base and collector are directly connected.
- For Q2 the situation is even worse as the base voltage is 0.6 V or so below Q1's base voltage.