Reduce and clip voltage of a 5Mhz ultrasonic signal from +-50V to 0-3.3 V

Question

I know there are a lot of posts similar to this one but some differences make it worth posting it.

I’m working on a project where I have a 5MHz AC signal with the largest amplitude of +-50V. It’s an ultrasonic signal where the transmitted signal has higher amplitude than the received. I want to sample both the transmitted and the received signals so that I can later calculate the distance between them. The DSP I'm using for this is TMS320F28335 from texas instruments, which only takes in 0-3.3V.

At first I thought a simple resistor divider would do the work but I encountered some problems, almost as those described in “How to Convert 0 to 10V analog signal to 0 to 2.5V for ADC input?”. However, the answers described there show how a signal can be linearly converted to a smaller voltage range. But since I’m not interested in the height of the transmitted signal (only interested in where it is relative the received signal) I want to clip parts of it and at the same time reduce the amplitude of the received signal. I want the received signal to have a good SNR as possible given the 3.3V limitation. Any ideas of methods I can use? I’m also wondering what the DSP will do with all the negative values I have?

Answer 1

The high voltage signal (+/- 50 Volts, i.e. 100 Volts peak to peak) can be attenuated and DC biased using a filter like this:

Note that all the components used are standard values. The output will be a signal of 3.242 Volts peak to peak, with a 1.65 Volts DC bias added. Thus, the resultant output to the ADC pin will not have any negative values, which addresses the concern mentioned in the question.

Using high precision (low tolerance %, e.g. 1%) tantalum capacitors and resistors, and keeping all traces / leads short, will prevent much variance in values and little stray inductance / capacitance.

Why this works:

• The combination of the 15 KOhm resistor and 1 pF capacitor acts as the upper half of a voltage divider. Impedance Z₁ of the R and C in series @ 5 MHz is 35188 Ohms
• The 27 pF capacitor acts as the lower half of the voltage divider. Impedance @ 5 Mhz is 1179 Ohms
• The 1 pF capacitor also blocks any DC component of the input signal
• Output of the voltage divider by Ohms Law: .
• For V_in = +/- 50 Volts = 100 Volts p-p, V_out = +/- 1.621 Volts = 3.242 Volts peak to peak
• The two 1 MOhm resistors again form a voltage divider for the 3.3 Volts V_cc, resulting in a DC bias of 1.65 Volts
• Adding this bias to the signal gives an output signal ranging from 0.029 Volts to 3.271 Volts for the -50 to +50 Volts input, with a small phase shift.

Output impedance of this filter is around 1.14 KOhms, and input impedance is around 36.36 kOhms.

Answer 2

It is not an uncommon issue in that the echo from you transmitted signal is larger and saturating than your response signal of interest. The trick is to subtract the transmitted signal as early as possible. Through either or combination of filters and/or subtraction.

In Microwave speed guns there is a physical reflector at a specific location to reflect the carrier at 180 degrees for a small percentage of the signal similar to its echo. In Dial/Analog Modems that I have designed the "Analog Front End" (AFE) commonly called DAA Hybrid circuit has Op Amp's to invert the transmitted signal and reduce it to nearly the same level of the expected echo, as to subtract it. Where this subtraction is not perfect, but reduces the signal to similar or lower levels then the response signal, so that neither are saturated. And filters can work on both signals.

In short I believe you need to make use of Op Amps and filters. Where the Hybrid Circuit is a good example and you can design your filters into it directly.

Answer 3

It seems to me that the most natural solution for you is to use a step down transformer with many windings on the primary to ensure that the driver is very lightly loaded. You can wind one of these on a pot core for very little effort.

You don't make it clear, but I will assume that you are not using the same unit to transmit and receive with as you seem to operating it CW. So that means a separate RX transducer and a seperate ADC channel into your DSP.

One thing that is most notable about your design is that the ADC runs only at 2 - 2.5X faster than your transmitted frequency (IIRC 90 ns sample period ~ 11 MHz). If you are detecting zero crossings between TX and RX this will be very difficult with such a low sample frequency (relative to your stimulus). You will probably have to do a FFT approach to determine the phase and make sure that your sample length that you use to determine that relative phase is quite long in order to average the error residue from the sampling.