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I am a SPICE simulator developer (math major, does not possess enough knowledge for the electrical engineering part), and recently I found some interesting facts in the netlist provided by the designer.

  1. For some resistors, the designer puts the same node name for both nodes (For the record, they know what they are doing). Why would they do that?

    For example: xr0 vs_in vs_in res_pp1_hsr_pcell_3 m=1 segl=26e-6 segw=1e-6 trise=0

  2. Also, sometimes the resistor has two different node names, but the value of the resistor is zero or one side of the resistor is left as dangling (for that it is not necessary a zero-valued resistor) What are the purposes of doing that?

  3. Another question is about dealing with dangling nodes in the circuit. For simulation, dangling nodes will cause some unknown behaviors, then one way to fix this is to connect the dangling one to the ground, or is there any better way to do that. Someone proposed to resemble a 0V voltage source to the dangling one. What is the reason behind that?

#More information/question on putting 0V voltage source w.r.t. #3: for a general element in the circuit (resistor, capacitor, inductor, diode & MOSFET in my situation most of the time) if one side (for the first 3) is connected to the rest of the circuit and one side is floating, so putting a 0V is also a bad idea. What about the diode and MOSFET, for MOSFET if drain is floating? what to do? similar thing for diode? if one of the p or n is floating?

For example:

xnm16 net58 net09 vs_in vs_in nch_svt_5p0v length=6e-6 width=5e-6 multi=1 m=1 ad=2.4e-12 as=2.4e-12 pd=10.96e-6 ps=10.96e-6 dtemp=0

v_xnm16_shortds net58 vs_in 0 (newly put)

...

.subckt nch_svt_5p0v d g s b width=10u length=0.5u multi=1 dtemp=0

...

mn d g s b nch_svt_5p0v_lvs w=width l=length m=multi ad=ad as=as pd=pd ps=ps dtemp=dtemp

net58 is a floating one before I put on the 0V line beneath it and since this is an x-instance the corresponding subckt definition gives the real connection info. So in this case, would putting a 0V be a good practice? If so, why? If not, what to do? Thank you!!!

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    \$\begingroup\$ In spice, dangling nodes are connected to ground through some very large resistance (gmin) as far as I know. \$\endgroup\$
    – Mike
    Jun 4, 2021 at 7:08
  • \$\begingroup\$ In NGSPICE, only if the first point is not convergent (i.e., not find in the first 100 iteration) then gmin is kicked in, but again, I don't think it is added to all the node, diagonal only. Don't know how other commercial simulator work in this case. \$\endgroup\$
    – Rich Zhang
    Jun 4, 2021 at 8:13
  • \$\begingroup\$ You seem fixed on the voltage source. A dangling node should not be a hindrance, but if it is and the simulator doesn't know to add gmin to it, then you can do it just fine with a high enough resistor (1g works in just about any situation). This goes for anything from resistor to MOSFET. \$\endgroup\$ Jun 4, 2021 at 14:22
  • \$\begingroup\$ @aconcernedcitizen I get you point whatever is floating, just throw a huge resistor to it. My concern on the 0V voltage source is from my supervisor. He wants to do that, and I just want to validate his idea. \$\endgroup\$
    – Rich Zhang
    Jun 5, 2021 at 2:03
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    \$\begingroup\$ @RichZhang Bimpelrekkie's answer already covers all your points, including his last phrase which concerns your last comment. Therefore there are very high chances that your supervisor's idea can be invalidated. Those few cases where a floating pin can be shorted are very few and tend to be the exceptions, rather than the rule. \$\endgroup\$ Jun 5, 2021 at 6:24

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For some resistors, the designer puts the same node name for both nodes (For the record, they know what they are doing). Why would they do that?

That will short the resistor so basically it is not there.

I see segl and segw which are probably segment length and width in um. That smells like a resistor on an IC (chip). On an IC (IC designers, I'm such a designer) we sometimes add "spare" components that allows us flexibility. Or the resistor was there at first, later it was found that it wasn't really needed so instead of removing it, it was shorted.

.. the value of the resistor is zero or one side of the resistor is left as dangling

That node isn't actually floating (dangling) because it is connected to the rest of the circuit through that resistor. I would not call this good practice, I would just short that resistor. But maybe there was a reason to do it like that, you will have to ask the designer.

For simulation, dangling nodes will cause some unknown behaviors..

Floating nodes indeed need to be avoided. Unless it is a gate of a MOSFET, a floating gate is forbidden.

In the netlist Floating nodes can confuse the circuit simulator. However, the simulator will connect those nodes to ground via a very high value resistor, like 1 Giga-Ohm so there should be no need for you to add connections.

Someone proposed to resemble a 0V voltage source to the dangling one. What is the reason behind that?

I would not do that, a 0 V voltage source is the same as a short. If you add that you change the circuit and it might stop working.

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    \$\begingroup\$ I started writing but it looks like you addressed most of the points. For the 2nd it may be a way to allow naming the same node in two ways, similar to what LTspice does (the requirement being to have a numeric literal zero as the value, not something that evaluates to zero). \$\endgroup\$ Jun 4, 2021 at 7:14

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