I am trying to build a hardware based ambilight using an FPGA, mostly for fun/learning. I have a copy of the HDMI 2.0 spec, and I’ve identified some issues I’m hoping someone here can help me solve.

The biggest challenge I’m facing is the fact that I’m only interested in the pixel data, not the audio and I’m not clear how to know whether the TMDS data is pixel or audio.

There's only a single TMDS clock, and HDMI takes advantage that the refresh rate is significantly slower than that clock, to send audio data with the pixel data.

How does one determine whether the data is pixel or audio?


1 Answer 1


For HDMI 2.0, 4 diff pairs are used to transmit TMDS[2:0] and clock, operating between 3 and 6Gbps. The protocol negotiates down to speeds defined in HDMI 1.4b for smaller frames/lower pixel rates.

For FPGA design, it's going to be a hard ask to get resolutions at HDMI 2.0 speeds (6Gbps-3Gbps), you'll need to use multiple transceivers on the FPGA for each channel, and clock each channel based off of the recovered TMDS clock. Since HDMI must be compliant with DVI (HDMI 1.3 Appendix C) just write a DVI sink, and have it link to that. There are no different pixel types (only RGB), no video guard bands, and no "data islands" that audio packets reside in.

Pretty sure the DVI spec can be found easily online (just search DVI spec).

If you're dead set on proceeding the painful path of an HDMI core, the way to differentiate HDMI audio and video packets is based off of the Preamble, which you can find its placement in the attached graph. The preamble precedes the video data period, and is marked by {CTL0, CTL1, CTL2, CTL3} <= 4'b1000

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