Some data:
Vin ~24VDC/12VDC Vout ~12VDC with worst case 4A peak current (short) or around 2A continuous. Parts: PMOS Schotky Inductance
Board is put into a switch cabinet with no direct air. Only passive. Ambient temperatures can be up to 40°C (wc)
For my project I am trying to design my own PMOS buck via LM25085 so I can get ~100 % duty cycle. The input voltage is either 12 or 24 VDC and it regulates itself to ~12 V (11.# something for 12 V in but that is fine). I took a inductance for a worst case current of 4-5 A but that will never happen unless something is wrong. I took all the parameters from the TI Webbench for the needed components so I think they are fine.
Now I am at the part where I want to put it onto my PCB. I followed the guidelines as much as I can.
"The first loop is that formed by CIN, Q1, L1, COUT, and back to CIN. The
second loop is that formed by D1, L1, COUT, and back to D1." I also tried to make these possible with the following configuration.
(In my picture C16 is Cin, C15 is Cvcc)
Here is the full schematic of the regulator
My question now is the following: I see that in the first picture there is just 1 big rectangle Vin that directly connects to Cin and Cvcc and Rsen while using a trace to get to the other? Is that correct? Does that mean I need to make a big shape and try to get all these components into the shape while all the other are fine with just a trace?
For the trace : I would like to now what trace width should I use here as it's not said in the layout. I am usually using normal 0.250 mm trace width but with the relative high current that thing can generate should I change all my trace width where the voltage/current is higher to a bigger width? (30 mills or something)
And last cooling: do I need some cooling or would that work?
