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Recently, there have been several youtube vids (example) talking about how modern CPUs are manufactured. Basically, it's a complex nightmare of dropping molten tin and lighting it with light, which produces a plasma light that does the proper etching (Edit: oops, etching is actually a chemical process after photolithography). However there is also a photomask produced in an entirely different process.

These manufacturings are very complex and I do not understand them much at all. What I'm curious about right now, is how old processors were made (70s and early 80s).

Something like the 6502 is a prime example. Today it is very cheap, but when it came out it was still extraordinarily cheap relative to other processors available.

How was it manufactured? I really want to know if it was basically the exact same process, just scaled down with much bigger transistor sizes---or something entirely different.

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    \$\begingroup\$ Less demanding lithography, otherwise pretty much same as today. I would recommend watching Bens episode of DIY lithography and (not so V)LSI over at Applied Science here: m.youtube.com/watch?v=YAPt_DcWAvw \$\endgroup\$
    – winny
    Jun 10 '21 at 18:39
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    \$\begingroup\$ The molten tin is used to produce EUV (Extreme Ultra Violet) light with a very short wavelength which is needed, not to etch but to illuminate a pattern on the wafer. I would advise not to try to understand all details as for example that molten tin is really a specialist niche application (for very small feature size chips) in the complete process of chip fabrication. Have you read: en.wikipedia.org/wiki/Integrated_circuit ? \$\endgroup\$ Jun 10 '21 at 18:40
  • \$\begingroup\$ @Bimpelrekkie I'm sure i have read that wiki article before, just don't remember when. I just read the Fabrification section and did not get a whole lot out of it, but like you said I shouldn't go after all the details right now. Right now the number one concern is if the "old" chips were manufactured in the same way, or a very different way (and if so, definitely want to read about it). \$\endgroup\$
    – DrZ214
    Jun 10 '21 at 19:17
  • \$\begingroup\$ Suggested reference textbook: Very Large Scale Integration (VLSI): Fundamentals and Applications by D. F. Barbe \$\endgroup\$
    – crasic
    Jun 10 '21 at 19:53
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    \$\begingroup\$ One thing that has RADICALLY changed is how they are designed. Today, everything is done with computer tools - The whole thing is laid out and simulated long before anything physical is created. But before there WERE computers, they had to do it different. It was all manually done, i.e. images.computerhistory.org/revonline/images/… \$\endgroup\$
    – Kyle B
    Jun 10 '21 at 21:08
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In the mid-1970s silicon-gate depletion-load NMOS chips such as the 6502 were made on 3-4" wafers. The methods involved photolithography for imaging. The wafer is coated (by a spin coater) with a photosensitive resist and the resist is exposed and then developed. Earlier chips used contact masks that would be in physical contact with the wafer, but around this time the projection mask technique was introduced by Perkin-Elmer.

The P-E Microalign system used a mercury lamp as the light source.

enter image description here

You can find a description of the steps involved here.

Needless to say, things have progressed quite a bit since that time and the wafer size, chip complexity and number of layers have increased greatly. The minimum dimensions have decreased something like 100 to 1000-fold (square that for complexity). The original 6502 was NMOS and dynamic so it had a minimum clock frequency (though an improvement over the M6800 which required a tightly specified two-phase clock that was expensive to generate). More modern cores are CMOS and static (allowing the clock to stop and also allowing the power dissipation from the depletion loads to be greatly reduced), but that requires more layers.

The 6800 listed for something like USD 300 per piece (and required that expensive two-phase clock generator). The MOS 6502 was introduced at a bargain $25 each.

Here in somewhat "Blair Witch Project" cinematography form is a YouTube video walkthrough of the mostly empty former MOS Technologies factory in PA.

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  • \$\begingroup\$ So it appears that this is basically the same processes except for the lithography, which was a static mercury lamp instead of drops of molten tin being "zapped". Is this an accurate summary? If so then it's kinda sad, i was hoping for some blissfully simple fabs compared to today. Btw, great site ChipHistory.org, definitely will roam around there. \$\endgroup\$
    – DrZ214
    Jun 10 '21 at 19:52
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    \$\begingroup\$ It was blissfully inexpensive, at least. My University had some hand-me-down 3" wafer fab equipment and could make simple parts. A single mask set today for a modern Si-Ge process probably costs more than all that equipment. \$\endgroup\$ Jun 10 '21 at 19:55
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    \$\begingroup\$ "So it appears that this is basically the same processes.." Yes more or less. The further down in feature size you go the smaller you also need the light-particles (photons) to be, hence you need a smaller wavelength laser. This is why they do the fancy "dropping molten tin and blasting it with another laser"-technique now, that is to produce hard x-ray laser light, which is very hard to do. \$\endgroup\$
    – Vinzent
    Jun 10 '21 at 21:28
  • \$\begingroup\$ @SpehroPefhany you're telling me I can make my own retro chips at home for less than 7 digits? \$\endgroup\$
    – user253751
    Jul 21 '21 at 15:59

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