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I’m working on a 4 layer PCB and this is my stackup:

1-TOP (signal)

2-GND (plane)

15-VCC (3V3 plane)

16-BOTTOM (signal)

On top layer I have a buck converter with 3V3 and GND output (0.5A max abs. current). How should I connect 3V3 and GND to inner plane?

i.e. with 2 or more vias (2 x 3V3 and 2 x GND) and connecting it like this:

Power plane: via to 3V3 from layer 1 to layer 15 GND plane: via to GND from layer 1 layer 2

Is it correct? Also do I need vias for all the combinations:

enter image description here

Thanks!

Edit:

About power planes:

Do I have to keep them as full as possible ?

enter image description here

enter image description here

I have also some unwired connection and my TOP and BOTTOM layers are full. Can I use L2 or L3 to connect? which one is better to use ? GND or 3V3 for signal ?

Thanks

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  • \$\begingroup\$ Sounds expensive for a four layer board. What’s the circuit? Very high speed and dense? Can you live with all though vias? \$\endgroup\$
    – winny
    Jun 14, 2021 at 12:28
  • \$\begingroup\$ no high speed, quite dense. but if I use through all via, do the inners layers connect automatically? \$\endgroup\$
    – D_A_8
    Jun 14, 2021 at 12:32
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    \$\begingroup\$ @D_A_8, no, the inner planes will be pulled back from the vias they aren't connected to. \$\endgroup\$ Jun 14, 2021 at 12:35
  • \$\begingroup\$ Tip: "via" isn't an initialisation so it doesn't get capitalised. via comes from Latin, where it has the meaning "way; route. \$\endgroup\$
    – Transistor
    Jun 14, 2021 at 13:07

2 Answers 2

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I'd expect blind and buried vias to be a massive cost factor that I'd avoid unless absolutely necessary.

For 500mA, current will not be a massive problem yet so the difference between one and two vias will be minimal, but waste heat from the switching FET might be an issue.

If your switching IC has a bottom pad, that is likely meant for cooling, and it would make sense to add a large copper area on the bottom that is connected to that pad through several vias.

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  • \$\begingroup\$ thanks Simon for your reply, I will add pads for the IC. So I will create: 3 VIAS from layer 1 to layer 16 for 3V3 3 VIAS from layer 1 to layer 16 for GND create poligon on layer 2 and connect to GND net create poligon on layer 15 and connect to 3V3 net correct? \$\endgroup\$
    – D_A_8
    Jun 14, 2021 at 12:51
  • \$\begingroup\$ It's unlikely that you'll need a lot of current through the GND connection of the switcher, as the GND connection of the components supplied through it bypasses the switching circuit (since it's a common GND). Adding a pad is helpful only if the IC has one at the bottom, e.g. if you look at the A4490 it has 20 small and one large pad, and the large pad is supposed to be connected to a polygon on the bottom layer with multiple vias, so the copper at the bottom can act as a heatsink. \$\endgroup\$ Jun 14, 2021 at 14:02
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Regarding the use of signal tracks on the power/ground planes: I’d very much recommend keeping the ground plane as completely solid as possible (apart from non-ground vias of course, which must pass through it). A very short signal track might be ok but a longer one would make the plane less effective. I’d be more inclined to use the VCC plane if necessary, but again keep the tracks short and avoid situations where one or more tracks constrict the amount of copper between two regions of the plane. Regarding the extent of the planes, the ground plane should certainly occupy almost the full area of the PCB (pulled back perhaps 0.5mm from the edges). The power plane need only extend as far as is needed, but there’s generally nothing to be gained by making it smaller than the ground plane.

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