I need to test buffers output DC current of DDR-3 memory. I want to write to the memory only hFF's (or h00's) and then fetch it into output buffer. Then I whant to run an infinity burst. Is there any limits on the time of the row active which not related to refresh time?
No, there is no limit other than the need to eventually refresh other rows.
When you activate a row, that entire row (also known as a page) is loaded into the sense amplifiers. Each sense amplifier is typically a latch, or something along the lines of a 6T SRAM cell. These cells will maintain the data stored in them indefinitely and do not need to be refreshed.
There are enough sense amplifiers to fit the entire active row/page at once, but there is no timing limitation once a row is activated. The contents of the row is destructively loaded (all the charge in that row's capacitors are depleted when read into the sense amplifiers), the sense amplifiers will latch the value and store it as long as power is there to maintain the state, and reading out these values (like loading them into the data output buffer) has no effect on the stored bits. You can think of the sense amplifiers like a true hardware register. The data isn't going anywhere unless you lose power entirely.
The activated row no longer has any data stored in it, as it was destroyed when the sense amplifiers read that row's bits. So there is nothing going on that puts any sort of time limit on how long the row can be active. Activating it has already destroyed all the data in it anyway, so there is nothing left to lose, regardless of any duration of time.
When you are done with bursting out all the bits over and over, you of course have to close the row again by issuing a
PRECHARGE command, which simply tells the sense amplifiers to recharge/write the stored values back into that row's capacitors. You explicitly write the values back into the row, so again, there is no maximum timing requirement involved.
It is important to keep in mind that there is only one row's worth of sense amplifiers shared for a given bank, so you'll always be limited by the refresh time. To refresh the other rows, each row is activated (destructively read into the sense amplifiers) then the sense amps immediately write it back - perform a precharge - into that row. Obviously you can't be sitting with some other row open during this time so any refresh will require closing an active row and then waiting for the sense amplifiers to finish refreshing each row before you can use them again.
As long as you mind the refresh time, there is no imposed limit on how long you can keep data in the sense amplifiers (in other words, how long you can keep a row activated).
Many memory controllers will operate DDR3 or DDR4 in exactly this way, something that is referred to as an 'open page policy'. A given row/page is kept open until the CPU needs to access data in a different row, and only then is it closed. This has largely been replaced with adaptive page management, which tries to anticipate memory accesses and will speculatively keep open or close the currently activated row depending on what the memory controller thinks is more likely to happen next: more reads from that same row, or a read from a different row.
My point is that keeping rows open for however long the memory controller wants to keep them open is a actually a pretty important aspect of memory management and optimizing memory performance. So keeping a row open like you intend isn't even usual - it is totally within the expected usage case for DDR memory. Assuming you aren't using a memory controller in between. If you are, you will want to ensure you can control the page policy, as some controllers can have a fixed page policy, where they only keep a page open for a fixed amount of time and close it after a timeout.