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I am looking into several DC/DC switching controllers. When talking about component selection, many datasheets and application notes say that inductor ripple should be kept around 20-40% of the inductor current (TI buck-boost design application note).

What is the reasoning behind this advice? More specifically, I understand that a high current ripple can damage the output capacitor network. Why is the advice not to minimize the inductor ripple altogether, and what are the other effects that the inductor ripple current has on the SMPS?

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  • \$\begingroup\$ I suspect this is related to the stability factor and DCR losses. Stored LC energy and input start energy can greatly exceed load energy which implies a certain Q of the RLC which if too high makes compensating a step load overshoot too difficult. It also implies greater ripple DCR loss I^2 DCR =P(L) \$\endgroup\$ Jun 16, 2021 at 13:18
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    \$\begingroup\$ Allowing higher ripple means that the inductor can be smaller (lower inductance is needed) \$\endgroup\$
    – Big6
    Jun 16, 2021 at 13:23
  • \$\begingroup\$ @Big6 True, but how far can you go? TI suggests 40%, but can I go higher, 60%? Or maybe even 80%? \$\endgroup\$
    – Mu3
    Jun 16, 2021 at 13:34
  • \$\begingroup\$ Inductor value is related to capacitor value at working frequency. Ripple can't be minimized to zero. It is a compromise between values used for L and C and some other characteristics. On the other end, L value change with high current (demagnetization). \$\endgroup\$
    – user288518
    Jun 16, 2021 at 13:42
  • \$\begingroup\$ @Antonio51 I see. What are the dangers of a ripple that is too high? \$\endgroup\$
    – Mu3
    Jun 16, 2021 at 13:50

2 Answers 2

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The main tradeoffs are as follows:

Higher inductor ripple:

Pros: Smaller inductor size, better transient response to load step and release.

Cons: Higher core and AC losses therefore lower efficiency, and higher output voltage ripple for similar output capacitance. (Or more output capacitance needed for the same output voltage ripple).

The converter may not be able to operate at higher ambient temperatures due to higher losses in the inductor pushing the temperature closer to the limit.

For voltage mode the double poles will move to higher frequency (due to lower inductance) for similar output capacitance, meaning the loop might be harder to compensate or may have less phase margin, or you would need higher output C.

Higher input ripple may also need more input capacitance.

The transition from CCM to DCM will happen at lower load currents, which may or may not be an issue.

The 20-40% ripple current rule is just a guideline, but it's an excellent starting point. Personally I think 20% is too low unless you don't need good load transient response and have plenty of space for a larger inductor.

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  • \$\begingroup\$ Thanks for the pros/cons analysis. I will keep this in mind (especially efficiency) and simulate some more configurations of my converter. \$\endgroup\$
    – Mu3
    Jun 17, 2021 at 8:10
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When your inductor has a ripple current less than 100% of the load current, it means that the inductor is operating in continuous conduction mode (CCM).

The benefits of running an inductor in CCM mode are:

  • Reduced capacitor ripple current
  • No ringing (=> reduced EMI)

When the inductor is in CCM, it takes most of the burden of supplying current to the load and the capacitor simply assists the inductor by smoothing out the voltage ripple and supplying some of the load current, but not all of it.

The "ringing" happens when the inductor is in discontinuous conduction mode (DCM). When the inductor current reaches 0A, the output capacitor, the inductor and the parasitic capacitances in the switching devices begin to oscillate (at quite a high frequency). This results in EMI emissions.

Here's what ringing looks like:

enter image description here

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  • \$\begingroup\$ Thanks for the answer. EMI is important for my design so I should keep this in mind. \$\endgroup\$
    – Mu3
    Jun 17, 2021 at 8:09

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