Understanding the Schmitt trigger circuit using CMOS inverters

Question

This is the circuit I'm trying to understand:

What I understand:

Clearly, whenever \$V_{out}\$ is low \$M_{3}\$ is off and the strength of \$M_{2}\$ and \$M_{4}\$ surpasses that of \$M_{1}\$ so the trip point shifts to the right, conversely, when \$V_{out}\$ is high, the trip point shift to the left. So we have that when \$V_{out}\$ is high we have a switching threshold of \$V_{dd}/2-\Delta_{1}\$ and when \$V_{out}\$ is low we have a switching threshold of \$V_{dd}/2+\Delta_{2}\$

However, why does this even make it work? It's enough to know about whether \$V_{out}\$ is high or low, the Schmitt trigger should choose the switching threshold according to whether \$V_{in}\$ (which is eventually \$V_{out}\$) is increasing or not, so what am I missing?

Answer 1

It was all cleared up after reading what @G36 sent, the \$V_{DD}/2+\Delta_{2}\$ threshold is set due to feedback whenever we're at \$V_{in}=0\$ then, the \$VDD/2+\Delta_{1}\$ is set once after that threshold (or for example if we're at \$V_{in}=V_{DD}\$.

The notion of "\$V_{in}\$ is eventually \$V_{out}\$ is incorrect" the buffer has one threshold at a time and would provide a clean output that trips provided an input that say changes from \$0\$ to \$V_{DD}\$ linearly.