I was reading this application note from Texas Instruments, Fundamentals of MOSFET and IGBT Gate Driver Circuits, (https://www.ti.com/lit/ml/slua618a/slua618a.pdf)

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I don't understand - why is there a need for the C_DRV capacitor. Why is the C_BST alone not enough to supply the high side driver? The C_BST will always have V_DRV on it and when the FET is on, it will go to V_DRV + VIN to supply the high-side driver.


2 Answers 2


why is there a need for the C_DRV capacitor.

On page 30 of TI app note it says:

Current starts to flow in R1 and R2 towards ground and the lower pnp transistor of the totempole driver turns on. As the gate of the main MOSFET discharges, the drain-to-source voltage increases and the source transitions to ground, allowing the rectifier to turn-on. During the off time of the main switch, the bootstrap capacitor is recharged to the VDRV level through the bootstrap diode. This current is supplied by the CDRV bypass capacitor of the ground referenced circuitry and it goes through DBST, CBST, and the conducting rectifier component. This is the basic operating principle of the bootstrap technique.

It appears that C_DRV is a bypass capacitor placed near the high-side driver to quickly provide current -- much like the purpose of capacitors placed at the output of a voltage regulator or the 0.1 uF bypass caps placed near logic chips.


The answer reads in the picture you quoted.

CBST is charged from CDRV.

Each time the FET is turned on, a small charge is drawn from CBST to charge the FET gate, and each time the FET is turned off, the CBST capacitor is recharged from CDRV capacitor via the DBST diode.

Since charging the CBST capacitor takes short high current pulses, the CDRV capacitor is the nearest bypass capacitor, a local storage from where large current surges are quickly available, as the short wires to it have very little inductance and resistance.

If there is no CDRV capacitor, there would be longer wires to power supply, or to nearest capacitor elsewhere. This means more resistance, so less current is available to charge the CBST so it does not happen so quickly, and due to resistance, there is a drop in the supply voltage at the chip when it draws a pulse of current. Longer wires mean also more inductance, so the current rises slower to the maximum value set by wire resistance. Also the larger inductance causes larger voltage drop during a pulse of current.

So basically, the CDRV is called a bypass capacitor, page 35 of the document you linked explains approximately same thing than the above writing, and page 16 has a lengthy explanation how to calculate the required capacitance for CDRV.


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