Recently I was reading about 8051 microcontroller instructions, and come to know that it has a set of registers from \$R_0 - R_7\$.Later on, when I was introduced with register banks then I feel like these registers \$R_0 - R_7\$ are not actual registers, rather, they are just different 8 slots of a selected register-bank. Is it true that \$R_0 - R_7\$ are just different 8 slots of the selected register-bank and are not 'actual registers' like the accumulator or register-B?

Is this the reason why when you push something in the stack you can't use push R1, and rather you have to use push <RAM address of the register>? Because, there is not any "fixed" \$R_1\$ register, and rather it varies with the bank selected?

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    \$\begingroup\$ Rather than trying to understand this core, which is barely manufactured by anyone nowadays. Intel closed down their production of it 14 years ago. Philips/NXP too, I believe. Even Silabs have labelled their 8051 stuff NRDR and I think that's the last of the rats clinging to the sunken ship. So why not study a core which isn't one of the most dysfunctional ever made and instead study something actually available in production? \$\endgroup\$
    – Lundin
    Jun 29, 2021 at 11:34
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    \$\begingroup\$ @Lundin 128 bytes of RAM should be enough for anybody:) \$\endgroup\$ Jun 29, 2021 at 11:41
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    \$\begingroup\$ @Lundin "barely manufactured"? A lot of chips that contain an embedded with MCU have a 8051 core. \$\endgroup\$
    – Justme
    Jun 29, 2021 at 11:48
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    \$\begingroup\$ Anyhoo I'm not qualified by knowledge to give a proper answer, but looking at the datasheet, yes, "R0 to R7" refers to the 8 bytes in a register bank. Bear in mind that any "actual" registers in any CPU are just internal RAM, even if they have been given fancy names like the Accumulator. Or Registers Tom, DIck and Harry. \$\endgroup\$
    – Ian Bland
    Jun 29, 2021 at 12:01
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    \$\begingroup\$ Conceptually, what is the difference between a ‘register’ implemented in ram vs a register (block of flip/flops)? They both perform the same function. As for the push/pop question, i’ve not had the reason to examine the 8051 microarchitecture. Suffice to say it is quirky, but there always seems to be an instruction that does what you want. \$\endgroup\$
    – Kartman
    Jun 29, 2021 at 13:00

1 Answer 1


Well, we need to differentiate between the real silicon and the programmer's model. Since just the latter is interesting for us, I will limit my answer to the model.

As you found, there are 4 banks of 8 registers each. The term "register" is a bit misleading here, since these are simply RAM bytes with the option to access them quickly and simple.

You can address each of these 32 registers by direct or indirect addressing. This is the same as addressing any other of the first 128 bytes of the internal RAM.

But the disadvantage is either a bigger instruction (direct addressing needs the address as a parameter) or complicated code (indirect addressing).

So many instructions allow to address a register just by its number, 0 to 7. The remaining bits of its address are built from constant 0s and the RS1 and RS0 bits of the PSW. Such instructions reserve 3 bits for the register number in their opcode.

Example: mov a,r3 with RS1 = 1 and RS0 = 0.

The instruction is coded as binary 11101011 with the register number in its lower bits (emphasized).

The RAM address is built like this:

  • 000..... for the constant zeroes in the MSBs,
  • ...10... from the RS1 and RS0 bits,
  • .....011 from the instruction,

giving a value of 00010011 (or 0x13) for R3 in bank #2.

Aside from the shorter instructions, are there other advantages of banking the general purpose registers?

Yes, you could for example write interrupt service routines using several registers without the need to push or to pop all of them. Dedicate a register bank to this ISR and just switch the bank. You only need to save the PSW.

Oh, and push is not such an instruction, unfortunately. The simple design of the 8051 does not provide such a variant of the instruction. That's why you need to write push acc instead of push a, BTW.


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